Retro/pcem
Watch
1
0
Fork
You've already forked pcem
 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Commit graph

  • fd10fdd372 Fix ATCLK timings on Winchip 2 CPUs. SarahW 2018-12-06 20:02:51 +00:00
  • a9541dadea Added preliminary emulation of AMD K6 CPUs. SarahW 2018-12-06 20:02:35 +00:00
  • 7ec6f1e4ce Added Winchip 2 timing model. SarahW 2018-12-05 20:54:56 +00:00
  • 9b8b6c2c70 Add Winchip 2A CPUs. SarahW 2018-12-04 21:35:51 +00:00
  • ca39b51803 Fix address calculation on PCMPEQD and PCMPGTD. SarahW 2018-12-04 21:35:26 +00:00
  • da2d819ed4 Added WinChip 2 emulation, along with (currently non-recompiled) 3DNow! instruction emulation. SarahW 2018-12-03 21:59:41 +00:00
  • 5043cff3f9 Move SFF-8038i IDE bus mastering code out of PIIX files. Add bus mastering to VT82C586B emulation. SarahW 2018-12-02 15:46:28 +00:00
  • 99ca11d148 Added initial emulation of FIC VA-503+ (Super 7). This includes preliminary emulation of the VIA MVP3 northbridge, VT82C586B 'PIPC' southbridge, and Winbond W83877TF SuperIO chip. SarahW 2018-12-02 12:38:31 +00:00
  • d5f07a8594 Fix bad use of flags variable in wx-sdl2-display.c. SarahW 2018-11-30 13:19:16 +00:00
  • 43b5b83644 Reduce codeblock_hash table to uint16_t. SarahW 2018-11-30 13:18:56 +00:00
  • 9ff1c7f409 Further reductions to codeblock_t size - replace link pointers with uint16_t block indicies, shrink ins to uint8_t, remove endpc. codeblock_t now fits in a 64-byte cacheline on 32-bit platforms. SarahW 2018-11-29 20:05:12 +00:00
  • 2007c25177 Start reducing size of codeblock_t structure. Re-arrange all variables needed to run a block to fit in a single cache line. SarahW 2018-11-28 20:29:48 +00:00
  • d63176e472 Move dynarec code memory out of codeblock structure. SarahW 2018-11-28 18:43:40 +00:00
  • 356f406b22 Fix codegen pointer register reads. SarahW 2018-11-28 18:41:53 +00:00
  • 335cea3ee1 Added recompiled versions of PUSHF and PUSHFD. SarahW 2018-11-28 15:19:21 +00:00
  • 5df3f6caef Added recompiled versions of PUSHA and POPA. SarahW 2018-11-28 11:50:24 +00:00
  • e012420f90 Added recompiled versions of CLC, CLD, CLI, CMC, STC, STD and STI. SarahW 2018-11-28 09:58:50 +00:00
  • a4d3aa1912 Move flags and eflags variables into cpu_struct. SarahW 2018-11-28 09:42:04 +00:00
  • c1565eb42f Fix partial register handling - removes pointless loads when writing to non-32-bit registers (eg FPU or MMX). SarahW 2018-11-27 19:43:01 +00:00
  • 92ab0ee8ef Fix flags on 8-bit memory INC/DEC. SarahW 2018-11-27 10:15:18 +00:00
  • e7d33dd76a Fixed Makefiles broken by rev 1197. SarahW 2018-11-27 09:39:06 +00:00
  • c034381797 Added Trigem Korean VGA emulation. Patch from Greatpsycho. SarahW 2018-11-26 17:36:47 +00:00
  • 07035c97c8 Added recompiled versions of FABS, FCHS, FSQRT and FTST. SarahW 2018-11-26 17:00:00 +00:00
  • 856f0b4471 ARM64 MMX fixes SarahW 2018-11-25 17:59:38 +00:00
  • 6341caf318 ARM MMX fixes SarahW 2018-11-24 20:35:33 +00:00
  • 2a19183d83 Added debug code to log execution rate of non-recompiled instructions. SarahW 2018-11-24 20:16:52 +00:00
  • 086422b79f Added recompiled versions of PMULLW, PMULHW and PMADDWD. SarahW 2018-11-24 12:52:08 +00:00
  • 77af266ab2 Added recompiled versions of PACK* and PUNPCK * SarahW 2018-11-23 18:34:30 +00:00
  • a991bc3249 Added recompiled versions of PCMP* SarahW 2018-11-23 15:17:21 +00:00
  • e43a2a6be0 Added recompiled versions of PSLL*, PSLR* and PSAR* with immediate shifts. SarahW 2018-11-22 18:43:36 +00:00
  • 35b9e0811b Added recompiled versions of PADD* and PSUB*. SarahW 2018-11-22 15:57:44 +00:00
  • 78c604c731 Added recompiled versions of PAND, PANDN, POR and PXOR SarahW 2018-11-21 20:51:34 +00:00
  • 76115568f2 Added recompiled versions of MOVD and MOVQ. SarahW 2018-11-21 17:02:20 +00:00
  • f545d9d57f Rename FPU stack-based integer mirror registers, to avoid confusion with non-stack-based MMX registers. SarahW 2018-11-21 12:44:47 +00:00
  • 59d5ce4a50 Reduce keyboard scancode and state arrays from int to uint8_t. Patch from Tale. SarahW 2018-11-20 10:50:21 +00:00
  • e0fd70b4a2 Correct keyboard scancode set used for key repeat. Patch from Tale. SarahW 2018-11-20 10:44:38 +00:00
  • e557bda696 Fixed DIP switch value for AMA932J's built-in OTI067. Fixes colour/black and white switch. Patch from Greatpsycho. SarahW 2018-11-20 10:40:38 +00:00
  • fa4ccece48 Fixed pixel clock on S3 ViRGE. SarahW 2018-11-20 09:40:54 +00:00
  • 964b20e820 Added recompiled versions of FLD1 and FLDZ. SarahW 2018-11-14 21:43:22 +00:00
  • 0055238ade Added recompiled versions of FCOM, FCOMP, FCOMPP, FICOM, FICOM, FUCOM, FUCOMP and FUCOMPP. SarahW 2018-11-14 21:42:20 +00:00
  • 4155b283ab Added Sigma Designs Color 400 emulation. Patch from John Elliott. SarahW 2018-11-13 18:53:55 +00:00
  • 5167ba5b2d Added Tulip AT Compact. Patch from dns2kv2. SarahW 2018-11-12 21:05:40 +00:00
  • 461cb221ca Implemented experimental Headland HT102 chipset based EMS support. Added Trigem 266M and AMA-932J machines. Patch from Greatpsycho. SarahW 2018-11-12 20:32:53 +00:00
  • 8dc7b2ef36 SCAT chipset improvements : - Implemented ROMCS enable feature. - Fixed RAM write protect register setting wasn't properly applied. - Implemented Encoded RAS mode emulation on 82C235 revision A and 82C386 chipset. - Implemented of experimental memory bank interleaved addressing emulation on 82C836 chipset and removed hardcoded memory configuration setting. KMX-C-02's BIOS now automatically detects DRAM configuration and set DRAM configuration register value correctly. - Improved accuracy of 82C235 chipset's memory bank addressing. GW-286CT GEAR BIOS now set DRAM configuration register correctly when Dynamic Memory Resizing is enabled. - Changed Award286 clone and Samsung SPC-4200P's chipset revision to rev A. - SCAT revision D chipset now set high ROM mapping size to 128KB. Patch from Greatpsycho SarahW 2018-11-12 20:16:32 +00:00
  • b814bcc80d Added recompiled versions of FSTCW and FSTSW. SarahW 2018-10-25 21:43:32 +01:00
  • 87191dde55 Added recompiled versions of FIST and FISTP. SarahW 2018-10-25 20:54:33 +01:00
  • 589f50e479 Added recompiled version of FILDq. SarahW 2018-10-22 21:23:09 +01:00
  • bce9ad4f3d Added recompiled versions of FFREE, FLD, FST, FSTP and FXCH. SarahW 2018-10-21 16:22:20 +01:00
  • 6d8af5df4a Added recompiled versions of memory variants of F[I]ADD, F[I]DIV, F[I]DIVR, F[I]MUL, F[I]SUB and F[I]SUBR. SarahW 2018-10-20 20:03:28 +01:00
  • 8a516df476 Added recompiled versions of FLD, FILD, FST and FSTP. SarahW 2018-10-17 19:47:04 +01:00
  • e17a94a409 FDIVP/FDIVRP should pop the stack when a divide by zero occurs and the exception is masked. Fixes software rendering on Need for Speed III. SarahW 2018-10-09 22:10:29 +01:00
  • 829c74f2d5 Don't write back unchanged registers on flush + invalidate. SarahW 2018-10-09 14:07:49 +01:00
  • d9e38fe37c Fix masking of FPU top-of-stack in several places. Fixes DOS Quake. SarahW 2018-10-09 13:51:05 +01:00
  • 305b6cc4fd Added recompiled register versions of FADDP, FDIVP, FDIVRP, FMULP, FSUBP and FSUBRP. SarahW 2018-10-08 21:44:30 +01:00
  • 78996b3e5c Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR. SarahW 2018-10-07 22:02:31 +01:00
  • dbb01ef9e2 Cleaned up x87 tag register handling. SarahW 2018-10-01 21:02:40 +01:00
  • e9ff110021 Fixed flags on register->register ADD/SUB opcode 00/01/28/29. Fixes rendering in Need For Speed II. SarahW 2018-09-30 17:30:28 +01:00
  • 94fe85b17e Fixed video clock on Cirrus Logic cards. SarahW 2018-09-29 17:43:02 +01:00
  • 592b07be63 Added recompiled versions of JMP indirect, JMP far, RETF, LxS, XLAT and LEAVE. SarahW 2018-09-29 17:42:44 +01:00
  • 1aadfd436d Added recompiled versions of CBW, CDQ, CWD, CWDE and MOVSX. SarahW 2018-09-23 21:45:12 +01:00
  • 8a19e56340 Added recompiled versions of INC and DEC. SarahW 2018-09-12 20:16:27 +01:00
  • 787aad9598 Reset EGA/VGA character scanline counter when hitting split screen start line. SarahW 2018-08-31 08:46:38 +01:00
  • 0d687a4f6c Implement horizontal soft panning on EGA/VGA text modes. SarahW 2018-08-31 08:44:00 +01:00
  • ad50530ded Force display redraw on writes to EGA/VGA attribute register 0x13 (soft panning). SarahW 2018-08-31 08:41:25 +01:00
  • 3332897886 Added recompiled versions of Jcc, JCXZ, LOOP, LOOPE and LOOPNE. SarahW 2018-08-30 22:26:33 +01:00
  • 872a2da788 Added recompiled versions of SHL, SHR, SAR, SHLD and SHRD. SarahW 2018-08-16 21:44:41 +01:00
  • 2783471daa Clamp SVGA display on/off timings to a minimum of 1 usec. Fixes hang on Windows XP boot with ViRGE/DX. SarahW 2018-08-08 22:15:21 +01:00
  • 4846616924 Handle REP prefixed instructions without a dedicated REP instruction handler properly in the recompiler. Fixes Windows XP setup. SarahW 2018-08-08 22:14:52 +01:00
  • 9bba93e0be Added recompiled versions of LEA, MOV seg, MOVZX, NEG, NOP, NOT, PUSH imm, TEST and XCHG. SarahW 2018-08-08 22:14:22 +01:00
  • 57e5549f48 Remove final remnants of ARM literal pool, and expand work register set to 7 registers. SarahW 2018-08-05 16:24:48 +01:00
  • f1df9be8f6 Added recompiled versions of JMP, CALL, RET, PUSH and POP. SarahW 2018-08-05 16:24:15 +01:00
  • 4ada3382b4 Fix inconsistent size of ide_fn array. SarahW 2018-08-03 19:44:35 +01:00
  • a9d46d95ec Use MOVW/MOVT to load immediates on ARM instead of a literal pool. SarahW 2018-08-02 22:09:57 +01:00
  • 42d62925c3 Fix compiler warnings on ARM builds. SarahW 2018-08-02 22:09:18 +01:00
  • a7d006b637 Rewrote timer code. SarahW 2018-08-02 22:06:10 +01:00
  • ab359ca9c5 Removed rogue CPU_BLOCK_END() from ropMOV_r_b() SarahW 2018-07-27 22:25:03 +01:00
  • e64271f5bb Added recompiled versions of mem->reg, reg->mem and imm->mem versions of ADD, AND, CMP, OR, SUB and XOR. SarahW 2018-07-27 22:24:34 +01:00
  • cf508b050f End block when register version hits a maximum count. SarahW 2018-07-25 20:18:03 +01:00
  • 5ca2533f3c Increase ARM64 work registers from 5 to 10. SarahW 2018-07-25 20:17:42 +01:00
  • f27b7f757a Add recompiled versions of mem->reg, reg->mem and imm->mem versions of MOV. SarahW 2018-07-25 20:16:58 +01:00
  • 91143d3c68 Move CPU segment structures into cpu_state structure. SarahW 2018-07-22 12:56:03 +01:00
  • 4e7a13f452 Corrected effective address for POP 0x8f. Windows 95 now works on recompiler. SarahW 2018-07-18 22:19:09 +01:00
  • 0f0a1c3223 Perform NULL segment checks upfront in opcode handlers, rather than on every memory access. This removes the need to pass the segment to readmem*l()/writemem*l(). SarahW 2018-07-18 22:10:18 +01:00
  • 648aa0e3e8 Added recompiled versions of 8 and 16 bit immediate->reg and reg->reg versions of MOV, ADD, SUB, CMP, AND, OR and XOR. SarahW 2018-07-17 22:08:25 +01:00
  • e4e0f76d5c De-duplicate ARM literal pools. SarahW 2018-07-08 16:36:26 +01:00
  • fc27be592c Added recompiled versions of immediate->reg and reg->reg versions of MOV, ADD, SUB, CMP, AND, OR and XOR. SarahW 2018-07-08 16:36:11 +01:00
  • 67804322b6 Add codegen_accumulate.c to Makefile.am. SarahW 2018-07-06 17:54:17 +01:00
  • ced37ac545 Hacked in quick ARM64 UOP_AND_IMM handling of immediate 0xffff. SarahW 2018-07-06 17:53:58 +01:00
  • d666c0aeb9 ARM64 UOP_ADD_IMM can now generate SUB instructions to better handle negative data. SarahW 2018-07-06 17:53:11 +01:00
  • dc2afee957 ARM UOP_ADD_IMM can now generate SUB instructions to better handle negative data. SarahW 2018-07-06 17:52:33 +01:00
  • 774f4201ee Recompiler now handles instruction and cycle counting. SarahW 2018-07-06 17:51:22 +01:00
  • 93ec6b0692 Recompiler now handles FPU prefixes. SarahW 2018-07-06 17:50:32 +01:00
  • 94fea237b4 Implemented effective address compilation. SarahW 2018-06-28 22:06:42 +01:00
  • ee3f9210dc Implemented basic register allocation. Mainly handles 'virtual' registers at the moment (eg current and last PC values, segment override status, etc). SarahW 2018-06-23 19:04:36 +01:00
  • 03fe25d818 First stage of dynamic recompiler rewrite. Basic IR generation calls C implementation of all instructions. Backend generation implemented for x86, x86-64, ARM and ARM64. SarahW 2018-06-17 20:26:15 +01:00
  • e6dce0920b Disable SDL thread naming on Windows. Fixes running PCem through GDB. SarahW 2018-06-05 18:22:47 +01:00
  • e44ca65ad6 Removed old bitrotted Win32 port. SarahW 2018-06-04 22:08:38 +01:00
  • b62127f7a8 Move BIOS loading out of mem.c. SarahW 2018-06-04 22:03:45 +01:00
  • 8ac2157f87 Fixed AT systems broken by rev 1184. SarahW 2018-06-04 21:38:18 +01:00
  • cbf4b9f813 Configurable MAC address. Patch from Tux. SarahW 2018-06-04 21:02:36 +01:00