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Use MOVW/MOVT to load immediates on ARM instead of a literal pool.

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This commit is contained in:
SarahW 2018-08-02 22:09:57 +01:00
commit a9d46d95ec
3 changed files with 19 additions and 74 deletions
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4
src/codegen_backend_arm.h
View file

@ -2,7 +2,7 @@
#define BLOCK_SIZE 0x1000
#define BLOCK_MASK 0x0fff
#define BLOCK_START 32
#define BLOCK_START 64
#define HASH_SIZE 0x20000
#define HASH_MASK 0x1ffff
@ -13,7 +13,7 @@
/*#define BLOCK_EXIT_OFFSET 0x7f0*/
#define BLOCK_GPF_OFFSET 0
#define BLOCK_EXIT_OFFSET 16
#define BLOCK_EXIT_OFFSET 32
#define ARM_LITERAL_POOL_OFFSET 0xf000

24
src/codegen_backend_arm_ops.c
View file

@ -201,8 +201,7 @@ void host_arm_ADD_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_ADD_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
}
}
@ -226,8 +225,7 @@ void host_arm_AND_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_AND_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
}
}
@ -314,8 +312,7 @@ void host_arm_CMN_IMM(codeblock_t *block, int src_reg, uint32_t imm)
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_CMN_REG_LSL(block, src_reg, REG_TEMP, 0);
}
}
@ -338,8 +335,7 @@ void host_arm_CMP_IMM(codeblock_t *block, int src_reg, uint32_t imm)
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_CMP_REG_LSL(block, src_reg, REG_TEMP, 0);
}
}
@ -358,8 +354,7 @@ void host_arm_EOR_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_EOR_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
}
}
@ -457,8 +452,7 @@ void host_arm_ORR_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_ORR_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
}
}
@ -519,8 +513,7 @@ void host_arm_SUB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_SUB_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
}
}
@ -544,8 +537,7 @@ void host_arm_TST_IMM(codeblock_t *block, int src_reg, uint32_t imm)
}
else
{
int offset = add_literal(block, imm);
host_arm_LDR_IMM(block, REG_TEMP, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_TEMP, imm);
host_arm_TST_REG(block, src_reg, REG_TEMP);
}
}

65
src/codegen_backend_arm_uops.c
View file

@ -49,8 +49,7 @@ static inline int in_range(void *addr, void *base)
void host_arm_call(codeblock_t *block, void *dst_addr)
{
int offset = add_literal(block, (uintptr_t)dst_addr);
host_arm_LDR_IMM(block, REG_R3, REG_LITERAL, offset);
host_arm_MOV_IMM(block, REG_R3, (uintptr_t)dst_addr);
host_arm_BLX(block, REG_R3);
}
@ -240,54 +239,22 @@ static int codegen_CMP_IMM_JZ(codeblock_t *block, uop_t *uop)
static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop)
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, REG_ARG0, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, REG_ARG0, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, REG_ARG0, uop->imm_data);
return 0;
}
static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop)
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, REG_ARG1, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, REG_ARG1, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, REG_ARG1, uop->imm_data);
return 0;
}
static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop)
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, REG_ARG2, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, REG_ARG2, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, REG_ARG2, uop->imm_data);
return 0;
}
static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop)
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, REG_ARG3, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, REG_ARG3, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, REG_ARG3, uop->imm_data);
return 0;
}
@ -519,15 +486,7 @@ static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
if (REG_IS_L(dest_size))
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, dest_reg, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, dest_reg, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, dest_reg, uop->imm_data);
}
else if (REG_IS_W(dest_size))
{
@ -551,8 +510,7 @@ static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
}
static int codegen_MOV_PTR(codeblock_t *block, uop_t *uop)
{
int offset = add_literal(block, (uintptr_t)uop->p);
host_arm_LDR_IMM(block, uop->dest_reg_a_real, REG_LITERAL, offset);
host_arm_MOV_IMM(block, uop->dest_reg_a_real, (uintptr_t)uop->p);
return 0;
}
@ -650,13 +608,8 @@ static int codegen_STORE_PTR_IMM(codeblock_t *block, uop_t *uop)
{
uint32_t arm_imm;
if (get_arm_imm(uop->imm_data, &arm_imm))
host_arm_MOV_IMM(block, REG_R0, uop->imm_data);
else
{
int offset = add_literal(block, uop->imm_data);
host_arm_LDR_IMM(block, REG_R0, REG_LITERAL, offset);
}
host_arm_MOV_IMM(block, REG_R0, uop->imm_data);
if (in_range(uop->p, &cpu_state))
host_arm_STR_IMM(block, REG_R0, REG_CPUSTATE, (uintptr_t)uop->p - (uintptr_t)&cpu_state);
else