Retro/pcem
Watch
1
0
Fork
You've already forked pcem
 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Remove final remnants of ARM literal pool, and expand work register set to 7 registers.

Browse source
This commit is contained in:
SarahW 2018-08-05 16:24:48 +01:00
commit 57e5549f48
4 changed files with 10 additions and 41 deletions
Download patch file Download diff file Expand all files Collapse all files

18
src/codegen_backend_arm.c
View file

@ -29,6 +29,10 @@ int codegen_host_reg_list[CODEGEN_HOST_REGS] =
REG_R4,
REG_R5,
REG_R6,
REG_R7,
REG_R8,
REG_R9,
REG_R11,
};
static void build_load_routine(codeblock_t *block, int size)
@ -203,14 +207,9 @@ void codegen_backend_init()
build_loadstore_routines(&codeblock[block_current]);
}
/*R11 - literal pool
R10 - cpu_state*/
/*R10 - cpu_state*/
void codegen_backend_prologue(codeblock_t *block)
{
int offset;
codegen_reset_literal_pool(block);
block_pos = 0;
block_pos = BLOCK_GPF_OFFSET;
@ -230,10 +229,7 @@ void codegen_backend_prologue(codeblock_t *block)
host_arm_STMDB_WB(block, REG_HOST_SP, REG_MASK_LOCAL | REG_MASK_LR);
host_arm_SUB_IMM(block, REG_HOST_SP, REG_HOST_SP, 0x20);
host_arm_ADD_IMM(block, REG_LITERAL, REG_PC, ARM_LITERAL_POOL_OFFSET);
host_arm_SUB_IMM(block, REG_LITERAL, REG_LITERAL, 16 + BLOCK_START);
offset = add_literal(block, (uintptr_t)&cpu_state);
host_arm_LDR_IMM(block, REG_CPUSTATE, REG_R11, offset);
host_arm_MOV_IMM(block, REG_CPUSTATE, (uint32_t)&cpu_state);
}
void codegen_backend_epilogue(codeblock_t *block)
@ -244,8 +240,6 @@ void codegen_backend_epilogue(codeblock_t *block)
if (block_pos > ARM_LITERAL_POOL_OFFSET)
fatal("Over limit!\n");
__clear_cache(&block->data[0], &block->data[block_pos]);
}

2
src/codegen_backend_arm.h
View file

@ -15,7 +15,7 @@
#define BLOCK_GPF_OFFSET 0
#define BLOCK_EXIT_OFFSET 32
#define ARM_LITERAL_POOL_OFFSET 0xf000
#define ARM_LITERAL_POOL_OFFSET 0x10000
/*#define BLOCK_MAX 1720*/
#define BLOCK_MAX 65208

3
src/codegen_backend_arm_defs.h
View file

@ -21,7 +21,6 @@
#define REG_ARG3 REG_R3
#define REG_CPUSTATE REG_R10
#define REG_LITERAL REG_R11
#define REG_TEMP REG_R3
@ -45,7 +44,7 @@
#define REG_MASK_LOCAL (REG_MASK_R4 | REG_MASK_R5 | REG_MASK_R6 | REG_MASK_R7 | \
REG_MASK_R8 | REG_MASK_R9 | REG_MASK_R10 | REG_MASK_R11)
#define CODEGEN_HOST_REGS 3
#define CODEGEN_HOST_REGS 7
extern void *codegen_mem_load_byte;
extern void *codegen_mem_load_word;

28
src/codegen_backend_arm_ops.c
View file

@ -105,32 +105,8 @@ static inline void codegen_addlong(codeblock_t *block, uint32_t val)
#define MOVT_IMM(imm) (((imm) & 0xfff) | (((imm) & 0xf000) << 4))
#define MOVW_IMM(imm) (((imm) & 0xfff) | (((imm) & 0xf000) << 4))
static int literal_offset = 0;
void codegen_reset_literal_pool(codeblock_t *block)
{
literal_offset = 0;
}
int add_literal(codeblock_t *block, uint32_t data)
{
int c;
if (literal_offset >= 4096)
fatal("add_literal - literal pool full\n");
/*Search for pre-existing value*/
for (c = 0; c < literal_offset; c += 4)
{
if (*(uint32_t *)&block->data[ARM_LITERAL_POOL_OFFSET + c] == data)
return c;
}
*(uint32_t *)&block->data[ARM_LITERAL_POOL_OFFSET + literal_offset] = data;
literal_offset += 4;
return literal_offset - 4;
}
#define LDRH_IMM(imm) (((imm) & 0xf) | (((imm) & 0xf0) << 4))
#define STRH_IMM(imm) LDRH_IMM(imm)
static inline uint32_t arm_data_offset(int offset)