Added recompiled register versions of FADDP, FDIVP, FDIVRP, FMULP, FSUBP and FSUBRP.
This commit is contained in:
parent
78996b3e5c
commit
305b6cc4fd
10 changed files with 190 additions and 65 deletions
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@ -416,7 +416,7 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
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break;
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case 0xde:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
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recomp_op_table = NULL;//recomp_opcodes_de;
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recomp_op_table = recomp_opcodes_de;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@ -200,3 +200,50 @@ RecompOpFn recomp_opcodes_dc[512] =
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/*e0*/ ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBRr, ropFSUBr, ropFSUBr, ropFSUBr, ropFSUBr, ropFSUBr, ropFSUBr, ropFSUBr, ropFSUBr,
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/*f0*/ ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr,
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};
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RecompOpFn recomp_opcodes_de[512] =
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{
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/*16-bit data*/
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/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
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/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*c0*/ ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP,
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/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*e0*/ ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP,
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/*f0*/ ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP,
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/*32-bit data*/
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/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
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/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*c0*/ ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP,
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/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*e0*/ ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBRP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP, ropFSUBP,
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/*f0*/ ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP,
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};
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@ -14,9 +14,9 @@ extern RecompOpFn recomp_opcodes_d8[512];
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extern RecompOpFn recomp_opcodes_da[512];
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extern RecompOpFn recomp_opcodes_db[512];*/
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extern RecompOpFn recomp_opcodes_dc[512];
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/*extern RecompOpFn recomp_opcodes_dd[512];
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/*extern RecompOpFn recomp_opcodes_dd[512];*/
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extern RecompOpFn recomp_opcodes_de[512];
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extern RecompOpFn recomp_opcodes_df[512];
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/*extern RecompOpFn recomp_opcodes_df[512];
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extern RecompOpFn recomp_opcodes_REPE[512];
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extern RecompOpFn recomp_opcodes_REPNE[512];*/
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@ -5,10 +5,16 @@
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#include "386_common.h"
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#include "x87.h"
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#include "codegen.h"
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#include "codegen_accumulate.h"
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#include "codegen_ir.h"
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#include "codegen_ops.h"
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#include "codegen_ops_fpu_arith.h"
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static void fpu_POP(ir_data_t *ir)
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{
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uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1);
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}
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uint32_t ropFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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@ -29,6 +35,17 @@ uint32_t ropFADDr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
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return op_pc;
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}
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uint32_t ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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uint32_t ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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@ -40,6 +57,16 @@ uint32_t ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
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return op_pc;
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}
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uint32_t ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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@ -50,16 +77,6 @@ uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
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return op_pc;
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}
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uint32_t ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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@ -70,6 +87,28 @@ uint32_t ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
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return op_pc;
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}
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uint32_t ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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uint32_t ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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uint32_t ropFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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@ -91,6 +130,17 @@ uint32_t ropFMULr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
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return op_pc;
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}
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uint32_t ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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uint32_t ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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@ -102,6 +152,16 @@ uint32_t ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
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return op_pc;
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}
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uint32_t ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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@ -112,16 +172,6 @@ uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
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return op_pc;
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}
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uint32_t ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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@ -132,3 +182,25 @@ uint32_t ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
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return op_pc;
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}
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uint32_t ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(ir);
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return op_pc;
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}
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@ -1,12 +1,18 @@
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uint32_t ropFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFADDr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFMULr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
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uint32_t ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
|
||||
uint32_t ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
|
||||
uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ void x87_dumpregs()
|
|||
}
|
||||
else
|
||||
{
|
||||
pclog("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n",cpu_state.ST[cpu_state.TOP],cpu_state.ST[(cpu_state.TOP+1)&7],cpu_state.ST[(cpu_state.TOP+2)&7],cpu_state.ST[(cpu_state.TOP+3)&7]);
|
||||
pclog("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n",cpu_state.ST[cpu_state.TOP&7],cpu_state.ST[(cpu_state.TOP+1)&7],cpu_state.ST[(cpu_state.TOP+2)&7],cpu_state.ST[(cpu_state.TOP+3)&7]);
|
||||
pclog("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n",cpu_state.ST[(cpu_state.TOP+4)&7],cpu_state.ST[(cpu_state.TOP+5)&7],cpu_state.ST[(cpu_state.TOP+6)&7],cpu_state.ST[(cpu_state.TOP+7)&7]);
|
||||
}
|
||||
pclog("Status = %04X Control = %04X Tag = %04X\n", cpu_state.npxs, cpu_state.npxc, x87_gettag());
|
||||
|
|
|
|||
|
|
@ -38,8 +38,8 @@ static inline void x87_checkexceptions()
|
|||
|
||||
static inline void x87_push(double i)
|
||||
{
|
||||
cpu_state.TOP=(cpu_state.TOP-1)&7;
|
||||
cpu_state.ST[cpu_state.TOP] = i;
|
||||
cpu_state.TOP--;
|
||||
cpu_state.ST[cpu_state.TOP&7] = i;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
}
|
||||
|
||||
|
|
@ -53,16 +53,16 @@ static inline void x87_push_u64(uint64_t i)
|
|||
|
||||
td.ll = i;
|
||||
|
||||
cpu_state.TOP=(cpu_state.TOP-1)&7;
|
||||
cpu_state.ST[cpu_state.TOP] = td.d;
|
||||
cpu_state.TOP--;
|
||||
cpu_state.ST[cpu_state.TOP&7] = td.d;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
}
|
||||
|
||||
static inline double x87_pop()
|
||||
{
|
||||
double t = cpu_state.ST[cpu_state.TOP];
|
||||
double t = cpu_state.ST[cpu_state.TOP&7];
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_EMPTY;
|
||||
cpu_state.TOP=(cpu_state.TOP+1)&7;
|
||||
cpu_state.TOP++;
|
||||
return t;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
ST(0) += use_var; \
|
||||
if ((cpu_state.npxc >> 10) & 3) \
|
||||
fesetround(FE_TONEAREST); \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
return 0; \
|
||||
} \
|
||||
|
|
@ -48,7 +48,7 @@ static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
SEG_CHECK_READ(cpu_state.ea_seg); \
|
||||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
x87_div(ST(0), ST(0), use_var); \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(73); \
|
||||
return 0; \
|
||||
} \
|
||||
|
|
@ -60,7 +60,7 @@ static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
SEG_CHECK_READ(cpu_state.ea_seg); \
|
||||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
x87_div(ST(0), use_var, ST(0)); \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(73); \
|
||||
return 0; \
|
||||
} \
|
||||
|
|
@ -72,7 +72,7 @@ static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
SEG_CHECK_READ(cpu_state.ea_seg); \
|
||||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) *= use_var; \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(11); \
|
||||
return 0; \
|
||||
} \
|
||||
|
|
@ -84,7 +84,7 @@ static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
SEG_CHECK_READ(cpu_state.ea_seg); \
|
||||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) -= use_var; \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
return 0; \
|
||||
} \
|
||||
|
|
@ -96,7 +96,7 @@ static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
SEG_CHECK_READ(cpu_state.ea_seg); \
|
||||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) = use_var - ST(0); \
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
return 0; \
|
||||
}
|
||||
|
|
@ -121,7 +121,7 @@ static int opFADD(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FADD\n");
|
||||
ST(0) = ST(0) + ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -232,7 +232,7 @@ static int opFDIV(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDIV\n");
|
||||
x87_div(ST(0), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -264,7 +264,7 @@ static int opFDIVR(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDIVR\n");
|
||||
x87_div(ST(0), ST(fetchdat&7), ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -296,7 +296,7 @@ static int opFMUL(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FMUL\n");
|
||||
ST(0) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(16);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -328,7 +328,7 @@ static int opFSUB(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSUB\n");
|
||||
ST(0) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -360,7 +360,7 @@ static int opFSUBR(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSUBR\n");
|
||||
ST(0) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -95,8 +95,8 @@ static int opFILDiq_a16(uint32_t fetchdat)
|
|||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
x87_push((double)temp64);
|
||||
cpu_state.MM[cpu_state.TOP].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID | TAG_UINT64;
|
||||
cpu_state.MM[cpu_state.TOP&7].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID | TAG_UINT64;
|
||||
|
||||
CLOCK_CYCLES(10);
|
||||
return 0;
|
||||
|
|
@ -111,8 +111,8 @@ static int opFILDiq_a32(uint32_t fetchdat)
|
|||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
x87_push((double)temp64);
|
||||
cpu_state.MM[cpu_state.TOP].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID | TAG_UINT64;
|
||||
cpu_state.MM[cpu_state.TOP&7].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID | TAG_UINT64;
|
||||
|
||||
CLOCK_CYCLES(10);
|
||||
return 0;
|
||||
|
|
@ -180,8 +180,8 @@ static int FISTPiq_a16(uint32_t fetchdat)
|
|||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP].q;
|
||||
if (cpu_state.tag[cpu_state.TOP&7] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP&7].q;
|
||||
else
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaq(temp64); if (cpu_state.abrt) return 1;
|
||||
|
|
@ -196,8 +196,8 @@ static int FISTPiq_a32(uint32_t fetchdat)
|
|||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP].q;
|
||||
if (cpu_state.tag[cpu_state.TOP&7] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP&7].q;
|
||||
else
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaq(temp64); if (cpu_state.abrt) return 1;
|
||||
|
|
|
|||
|
|
@ -335,8 +335,8 @@ static int opFLD(uint32_t fetchdat)
|
|||
old_tag = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
old_i64 = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
x87_push(ST(fetchdat&7));
|
||||
cpu_state.tag[cpu_state.TOP] = old_tag;
|
||||
cpu_state.MM[cpu_state.TOP].q = old_i64;
|
||||
cpu_state.tag[cpu_state.TOP&7] = old_tag;
|
||||
cpu_state.MM[cpu_state.TOP&7].q = old_i64;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -352,11 +352,11 @@ static int opFXCH(uint32_t fetchdat)
|
|||
td = ST(0);
|
||||
ST(0) = ST(fetchdat&7);
|
||||
ST(fetchdat&7) = td;
|
||||
old_tag = cpu_state.tag[cpu_state.TOP];
|
||||
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
old_tag = cpu_state.tag[cpu_state.TOP&7];
|
||||
cpu_state.tag[cpu_state.TOP&7] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = old_tag;
|
||||
old_i64 = cpu_state.MM[cpu_state.TOP].q;
|
||||
cpu_state.MM[cpu_state.TOP].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
old_i64 = cpu_state.MM[cpu_state.TOP&7].q;
|
||||
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q = old_i64;
|
||||
|
||||
CLOCK_CYCLES(4);
|
||||
|
|
@ -369,7 +369,7 @@ static int opFCHS(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FCHS\n");
|
||||
ST(0) = -ST(0);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -380,7 +380,7 @@ static int opFABS(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FABS %f\n", ST(0));
|
||||
ST(0) = fabs(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -488,7 +488,7 @@ static int opF2XM1(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("F2XM1\n");
|
||||
ST(0) = pow(2.0, ST(0)) - 1.0;
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(200);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -523,7 +523,7 @@ static int opFPTAN(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FPTAN\n");
|
||||
ST(0) = tan(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
x87_push(1.0);
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(235);
|
||||
|
|
@ -547,7 +547,7 @@ static int opFDECSTP(uint32_t fetchdat)
|
|||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDECSTP\n");
|
||||
cpu_state.TOP = (cpu_state.TOP - 1) & 7;
|
||||
cpu_state.TOP--;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -557,7 +557,7 @@ static int opFINCSTP(uint32_t fetchdat)
|
|||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDECSTP\n");
|
||||
cpu_state.TOP = (cpu_state.TOP + 1) & 7;
|
||||
cpu_state.TOP++;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -570,7 +570,7 @@ static int opFPREM(uint32_t fetchdat)
|
|||
if (fplog) pclog("FPREM %f %f ", ST(0), ST(1));
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
if (fplog) pclog("%f\n", ST(0));
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
|
|
@ -587,7 +587,7 @@ static int opFPREM1(uint32_t fetchdat)
|
|||
if (fplog) pclog("FPREM1 %f %f ", ST(0), ST(1));
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
if (fplog) pclog("%f\n", ST(0));
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
|
|
@ -603,7 +603,7 @@ static int opFSQRT(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSQRT\n");
|
||||
ST(0) = sqrt(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(83);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -616,7 +616,7 @@ static int opFSINCOS(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSINCOS\n");
|
||||
td = ST(0);
|
||||
ST(0) = sin(td);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
x87_push(cos(td));
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(330);
|
||||
|
|
@ -629,7 +629,7 @@ static int opFRNDINT(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FRNDINT %g ", ST(0));
|
||||
ST(0) = (double)x87_fround(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
if (fplog) pclog("%g\n", ST(0));
|
||||
CLOCK_CYCLES(21);
|
||||
return 0;
|
||||
|
|
@ -643,7 +643,7 @@ static int opFSCALE(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSCALE\n");
|
||||
temp64 = (int64_t)ST(1);
|
||||
ST(0) = ST(0) * pow(2.0, (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(30);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -654,7 +654,7 @@ static int opFSIN(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSIN\n");
|
||||
ST(0) = sin(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(300);
|
||||
return 0;
|
||||
|
|
@ -666,7 +666,7 @@ static int opFCOS(uint32_t fetchdat)
|
|||
cpu_state.pc++;
|
||||
if (fplog) pclog("FCOS\n");
|
||||
ST(0) = cos(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(300);
|
||||
return 0;
|
||||
|
|
@ -836,8 +836,8 @@ static int opFSTCW_a32(uint32_t fetchdat)
|
|||
if (fplog) pclog("FCMOV %f\n", ST(fetchdat & 7)); \
|
||||
if (cond_ ## condition) \
|
||||
{ \
|
||||
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
|
||||
cpu_state.MM[cpu_state.TOP].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
|
||||
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
|
||||
ST(0) = ST(fetchdat & 7); \
|
||||
} \
|
||||
CLOCK_CYCLES(4); \
|
||||
|
|
|
|||
Loading…
Reference in a new issue