Added preliminary emulation of AMD K6 CPUs.
This commit is contained in:
SarahW
parent
7ec6f1e4ce
commit
a9541dadea
3 changed files with 383 additions and 2 deletions
374
src/cpu.c
374
src/cpu.c
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@ -500,6 +500,55 @@ CPU cpus_Pentium[] =
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{"", -1, 0, 0, 0}
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};
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CPU cpus_K6_S7[] =
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{
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/*AMD K6*/
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{"K6/166", CPU_K6, 19, 166666666, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, 20},
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{"K6/200", CPU_K6, 21, 200000000, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 24},
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{"K6/233", CPU_K6, 24, 233333333, 4, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
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{"K6/266", CPU_K6, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
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{"K6/300", CPU_K6, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
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{"K6-2/233", CPU_K6_2, 24, 233333333, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
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{"K6-2/266", CPU_K6_2, 26, 266666666, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
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{"K6-2/300 AFR-66", CPU_K6_2, 28, 300000000, 5, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
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{"", -1, 0, 0, 0}
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};
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CPU cpus_K6_SS7[] =
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{
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/*AMD K6*/
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{"K6/166", CPU_K6, 19, 166666666, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, 20},
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{"K6/200", CPU_K6, 21, 200000000, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 24},
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{"K6/233", CPU_K6, 24, 233333333, 4, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
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{"K6/266", CPU_K6, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
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{"K6/300", CPU_K6, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
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{"K6-2/233", CPU_K6_2, 24, 233333333, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
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{"K6-2/266", CPU_K6_2, 26, 266666666, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
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{"K6-2/300", CPU_K6_2, 28, 300000000, 5, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
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{"K6-2/333", CPU_K6_2, 28, 333333333, 5, 31666667, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 40},
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{"K6-2/350", CPU_K6_2, 28, 350000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 42},
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{"K6-2/366", CPU_K6_2, 28, 366666666, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 44},
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{"K6-2/380", CPU_K6_2, 28, 380000000, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 46},
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{"K6-2/400", CPU_K6_2, 28, 400000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
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{"K6-2/450", CPU_K6_2, 28, 450000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
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{"K6-2/475", CPU_K6_2, 28, 475000000, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
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{"K6-2/500", CPU_K6_2, 28, 500000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
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{"K6-2/533", CPU_K6_2, 28, 533333333, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 64},
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{"K6-2/550", CPU_K6_2, 28, 550000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 66},
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{"K6-2+/450", CPU_K6_2P, 28, 450000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
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{"K6-2+/475", CPU_K6_2P, 28, 475000000, 5, 31666667, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
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{"K6-2+/500", CPU_K6_2P, 28, 500000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
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{"K6-2+/533", CPU_K6_2P, 28, 533333333, 5, 31666667, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 64},
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{"K6-2+/550", CPU_K6_2P, 28, 550000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 66},
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{"K6-III/400", CPU_K6_3, 28, 400000000, 5, 33333333, 0x591, 0x591, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
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{"K6-III/450", CPU_K6_3, 28, 450000000, 5, 33333333, 0x591, 0x591, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
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{"K6-III+/400", CPU_K6_3P, 28, 400000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
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{"K6-III+/450", CPU_K6_3P, 28, 450000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
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{"K6-III+/475", CPU_K6_3P, 28, 475000000, 5, 31666667, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
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{"K6-III+/500", CPU_K6_3P, 28, 500000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
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{"", -1, 0, 0, 0}
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};
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void cpu_set_edx()
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{
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EDX = models[model].cpu[cpu_manufacturer].cpus[cpu].edx_reset;
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@ -1287,6 +1336,91 @@ void cpu_set()
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ccr4 = 0x80;
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break;
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case CPU_K6:
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x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f);
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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timing_mr = 3; /*memory dest - register src*/
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timing_mm = 3;
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timing_rml = 2; /*register dest - memory src long*/
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timing_mrl = 3; /*memory dest - register src long*/
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timing_mml = 3;
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timing_bt = 0; /*branch taken*/
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timing_bnt = 1; /*branch not taken*/
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timing_int = 6;
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timing_int_rm = 11;
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timing_int_v86 = 54;
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timing_int_pm = 25;
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timing_int_pm_outer = 42;
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timing_iret_rm = 7;
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timing_iret_v86 = 27; /*unknown*/
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timing_iret_pm = 10;
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timing_iret_pm_outer = 27;
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timing_call_rm = 4;
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timing_call_pm = 4;
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timing_call_pm_gate = 22;
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timing_call_pm_gate_inner = 44;
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timing_retf_rm = 4;
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timing_retf_pm = 4;
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timing_retf_pm_outer = 23;
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timing_jmp_rm = 3;
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timing_jmp_pm = 3;
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timing_jmp_pm_gate = 18;
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timing_misaligned = 3;
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cpu_hasrdtsc = 1;
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msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
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cpu_hasMMX = 1;
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cpu_hasMSR = 1;
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cpu_hasCR4 = 1;
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cpu_hasVME = 1;
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cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE;
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codegen_timing_set(&codegen_timing_pentium);
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break;
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case CPU_K6_2:
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case CPU_K6_3:
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case CPU_K6_2P:
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case CPU_K6_3P:
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x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
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timing_rr = 1; /*register dest - register src*/
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timing_rm = 2; /*register dest - memory src*/
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timing_mr = 3; /*memory dest - register src*/
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timing_mm = 3;
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timing_rml = 2; /*register dest - memory src long*/
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timing_mrl = 3; /*memory dest - register src long*/
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timing_mml = 3;
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timing_bt = 0; /*branch taken*/
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timing_bnt = 1; /*branch not taken*/
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timing_int = 6;
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timing_int_rm = 11;
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timing_int_v86 = 54;
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timing_int_pm = 25;
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timing_int_pm_outer = 42;
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timing_iret_rm = 7;
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timing_iret_v86 = 27; /*unknown*/
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timing_iret_pm = 10;
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timing_iret_pm_outer = 27;
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timing_call_rm = 4;
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timing_call_pm = 4;
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timing_call_pm_gate = 22;
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timing_call_pm_gate_inner = 44;
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timing_retf_rm = 4;
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timing_retf_pm = 4;
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timing_retf_pm_outer = 23;
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timing_jmp_rm = 3;
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timing_jmp_pm = 3;
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timing_jmp_pm_gate = 18;
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timing_misaligned = 3;
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cpu_hasrdtsc = 1;
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msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
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cpu_hasMMX = 1;
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cpu_hasMSR = 1;
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cpu_hasCR4 = 1;
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cpu_hasVME = 1;
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cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE;
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codegen_timing_set(&codegen_timing_pentium);
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break;
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default:
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fatal("cpu_set : unknown CPU type %i\n", cpu_s->cpu_type);
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}
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@ -1571,6 +1705,220 @@ void cpu_CPUID()
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EAX = EBX = ECX = EDX = 0;
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break;
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case CPU_K6:
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switch (EAX)
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{
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case 0:
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EAX = 1;
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EBX = 0x68747541; /*AuthenticAMD*/
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ECX = 0x444d4163;
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EDX = 0x69746e65;
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break;
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case 1:
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EAX = CPUID;
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EBX = ECX = 0;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
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break;
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case 0x80000000:
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EAX = 0x80000005;
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break;
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case 0x80000001:
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EAX = CPUID+0x100;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
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break;
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case 0x80000002: /*Processor name string*/
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EAX = 0x2d444d41; /*AMD-K6tm w/ mult*/
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EBX = 0x6d74364b;
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ECX = 0x202f7720;
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EDX = 0x746c756d;
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break;
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case 0x80000003: /*Processor name string*/
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EAX = 0x64656d69; /*imedia extension*/
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EBX = 0x65206169;
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ECX = 0x6e657478;
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EDX = 0x6e6f6973;
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break;
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case 0x80000004: /*Processor name string*/
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EAX = 0x00000073; /*s*/
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EBX = 0x00000000;
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ECX = 0x00000000;
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EDX = 0x00000000;
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break;
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case 0x80000005: /*Cache information*/
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EBX = 0x02800140; /*TLBs*/
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ECX = 0x20020220; /*L1 data cache*/
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EDX = 0x20020220; /*L1 instruction cache*/
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break;
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default:
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EAX = EBX = ECX = EDX = 0;
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break;
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}
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break;
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case CPU_K6_2:
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switch (EAX)
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{
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case 0:
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EAX = 1;
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EBX = 0x68747541; /*AuthenticAMD*/
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ECX = 0x444d4163;
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EDX = 0x69746e65;
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break;
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case 1:
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EAX = CPUID;
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EBX = ECX = 0;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
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break;
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case 0x80000000:
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EAX = 0x80000005;
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break;
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case 0x80000001:
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EAX = CPUID+0x100;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
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break;
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case 0x80000002: /*Processor name string*/
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EAX = 0x2d444d41; /*AMD-K6(tm) 3D pr*/
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EBX = 0x7428364b;
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ECX = 0x3320296d;
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EDX = 0x72702044;
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break;
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case 0x80000003: /*Processor name string*/
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EAX = 0x7365636f; /*ocessor*/
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EBX = 0x00726f73;
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ECX = 0x00000000;
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EDX = 0x00000000;
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break;
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case 0x80000005: /*Cache information*/
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EBX = 0x02800140; /*TLBs*/
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ECX = 0x20020220; /*L1 data cache*/
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EDX = 0x20020220; /*L1 instruction cache*/
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break;
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default:
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EAX = EBX = ECX = EDX = 0;
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break;
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}
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break;
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case CPU_K6_3:
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switch (EAX)
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{
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case 0:
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EAX = 1;
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EBX = 0x68747541; /*AuthenticAMD*/
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ECX = 0x444d4163;
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EDX = 0x69746e65;
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break;
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case 1:
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EAX = CPUID;
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EBX = ECX = 0;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
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break;
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case 0x80000000:
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EAX = 0x80000006;
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break;
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case 0x80000001:
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EAX = CPUID+0x100;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
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break;
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case 0x80000002: /*Processor name string*/
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EAX = 0x2d444d41; /*AMD-K6(tm) 3D+ P*/
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EBX = 0x7428364b;
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ECX = 0x3320296d;
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EDX = 0x50202b44;
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break;
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case 0x80000003: /*Processor name string*/
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EAX = 0x65636f72; /*rocessor*/
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EBX = 0x726f7373;
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ECX = 0x00000000;
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EDX = 0x00000000;
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break;
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case 0x80000005: /*Cache information*/
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EBX = 0x02800140; /*TLBs*/
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ECX = 0x20020220; /*L1 data cache*/
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EDX = 0x20020220; /*L1 instruction cache*/
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break;
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case 0x80000006: /*L2 Cache information*/
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ECX = 0x01004220;
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break;
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default:
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EAX = EBX = ECX = EDX = 0;
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break;
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}
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break;
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case CPU_K6_2P:
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case CPU_K6_3P:
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switch (EAX)
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{
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case 0:
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EAX = 1;
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EBX = 0x68747541; /*AuthenticAMD*/
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ECX = 0x444d4163;
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EDX = 0x69746e65;
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break;
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case 1:
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EAX = CPUID;
|
||||
EBX = ECX = 0;
|
||||
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
|
||||
break;
|
||||
case 0x80000000:
|
||||
EAX = 0x80000007;
|
||||
break;
|
||||
case 0x80000001:
|
||||
EAX = CPUID+0x100;
|
||||
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
|
||||
break;
|
||||
|
||||
case 0x80000002: /*Processor name string*/
|
||||
EAX = 0x2d444d41; /*AMD-K6(tm)-III P*/
|
||||
EBX = 0x7428364b;
|
||||
ECX = 0x492d296d;
|
||||
EDX = 0x50204949;
|
||||
break;
|
||||
|
||||
case 0x80000003: /*Processor name string*/
|
||||
EAX = 0x65636f72; /*rocessor*/
|
||||
EBX = 0x726f7373;
|
||||
ECX = 0x00000000;
|
||||
EDX = 0x00000000;
|
||||
break;
|
||||
|
||||
case 0x80000005: /*Cache information*/
|
||||
EBX = 0x02800140; /*TLBs*/
|
||||
ECX = 0x20020220; /*L1 data cache*/
|
||||
EDX = 0x20020220; /*L1 instruction cache*/
|
||||
break;
|
||||
|
||||
case 0x80000006: /*L2 Cache information*/
|
||||
if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_K6_3P)
|
||||
ECX = 0x01004220;
|
||||
else
|
||||
ECX = 0x00804220;
|
||||
break;
|
||||
|
||||
case 0x80000007: /*PowerNow information*/
|
||||
EDX = 7;
|
||||
break;
|
||||
|
||||
default:
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1632,6 +1980,20 @@ void cpu_RDMSR()
|
|||
break;
|
||||
}
|
||||
break;
|
||||
case CPU_K6:
|
||||
case CPU_K6_2:
|
||||
case CPU_K6_3:
|
||||
case CPU_K6_2P:
|
||||
case CPU_K6_3P:
|
||||
EAX = EDX = 0;
|
||||
switch (ECX)
|
||||
{
|
||||
case 0x10:
|
||||
EAX = tsc & 0xffffffff;
|
||||
EDX = tsc >> 32;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1700,6 +2062,18 @@ void cpu_WRMSR()
|
|||
break;
|
||||
}
|
||||
break;
|
||||
case CPU_K6:
|
||||
case CPU_K6_2:
|
||||
case CPU_K6_3:
|
||||
case CPU_K6_2P:
|
||||
case CPU_K6_3P:
|
||||
switch (ECX)
|
||||
{
|
||||
case 0x10:
|
||||
tsc = EAX | ((uint64_t)EDX << 32);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -35,6 +35,11 @@ extern int cpu, cpu_manufacturer;
|
|||
#define CPU_Cx6x86MX 20
|
||||
#define CPU_Cx6x86L 21
|
||||
#define CPU_CxGX1 22
|
||||
#define CPU_K6 23
|
||||
#define CPU_K6_2 24
|
||||
#define CPU_K6_3 25
|
||||
#define CPU_K6_2P 26
|
||||
#define CPU_K6_3P 27
|
||||
|
||||
#define MANU_INTEL 0
|
||||
#define MANU_AMD 1
|
||||
|
|
@ -90,6 +95,8 @@ extern CPU cpus_Pentium5V[];
|
|||
extern CPU cpus_PentiumS5[];
|
||||
extern CPU cpus_Pentium[];
|
||||
extern CPU cpus_6x86[];
|
||||
extern CPU cpus_K6_S7[];
|
||||
extern CPU cpus_K6_SS7[];
|
||||
|
||||
extern CPU cpus_pcjr[];
|
||||
extern CPU cpus_europc[];
|
||||
|
|
|
|||
|
|
@ -191,9 +191,9 @@ MODEL models[] =
|
|||
{"[Socket 5] Intel Advanced/ZP", ROM_ZAPPA, "zappa", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_zappa_init, NULL},
|
||||
{"[Socket 5] Packard Bell PB570", ROM_PB570, "pb570", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_pb570_init, NULL},
|
||||
|
||||
{"[Socket 7] Award 430VX PCI", ROM_430VX, "430vx", { {"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 256, 1, at_i430vx_init, NULL},
|
||||
{"[Socket 7] Award 430VX PCI", ROM_430VX, "430vx", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_S7}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_i430vx_init, NULL},
|
||||
|
||||
{"[Super 7] FIC VA-503+", ROM_FIC_VA503P, "fic_va503p", { {"Intel", cpus_Pentium}, {"IDT", cpus_WinChip_SS7}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 512, 1, at_mvp3_init, NULL},
|
||||
{"[Super 7] FIC VA-503+", ROM_FIC_VA503P, "fic_va503p", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_SS7}, {"IDT", cpus_WinChip_SS7}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 512, 1, at_mvp3_init, NULL},
|
||||
|
||||
{"", -1, "", {{"", 0}, {"", 0}, {"", 0}}, 0,0,0, 0}
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue