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  • 73c20a723f Clear integer registers on CPU reset. Fixes hang on reboot on VA-503+. SarahW 2019-04-10 20:28:45 +01:00
  • b2e236e720 Mark FINIT as ending a code block. Fixes crash in Armoured Fist II. SarahW 2019-04-09 22:19:39 +01:00
  • a5fc447950 Implement non-extended-ALU extended writes on HT216-32. Fixes Windows 3.1 built-in Video 7 drivers. SarahW 2019-04-08 20:04:38 +01:00
  • d49aab7782 Reworked HT216-32 banking code. Fixes graphics errors in Windows 3.x. SarahW 2019-04-07 21:54:47 +01:00
  • 3fd56facb6 Fixed Makefile typo introduced in 1211. SarahW 2019-04-05 17:25:34 +01:00
  • 35962551dd Added emulation of Packard Bell PB410A, along with the built-in Headland HT216-32 video. SarahW 2019-04-03 21:32:48 +01:00
  • fc369826a4 Fix start address when calculating block size. Fixes rendering issues in Wolfenstein 3D. SarahW 2019-04-02 20:40:40 +01:00
  • 8a91051e25 SST flash now keeps local copy of flash data to write back on device close. Prevents flash corruption when switching models and PCem loads the new BIOS before writing out the old flash. SarahW 2019-04-01 21:38:21 +01:00
  • 7f99cb7fb1 Use correct value for MAX_INSTRUCTION_COUNT. SarahW 2019-04-01 21:24:32 +01:00
  • a0ab14f56f When unrolling a loop, set op_32, ea_seg and ssegs to the correct values at the start of the loop. Fixes mode setting on Bahamas 64 and most likely some other bugs. SarahW 2019-04-01 21:23:09 +01:00
  • 7a68bca85f Fixed some ARM64 build warnings. SarahW 2019-03-31 18:23:34 +01:00
  • 3890ffdff0 Fixed multiple definition of REG_SP in ARM64 backend. Fixes build warnings, also fixes Windows 3.x. SarahW 2019-03-31 18:23:21 +01:00
  • 584e67845b Added ROL, ROR and NOP uops to ARM and ARM64 backends. SarahW 2019-03-31 18:21:56 +01:00
  • e3d5309e23 Added SST 39SF010 flash for VA-503+. SarahW 2019-03-31 11:29:07 +01:00
  • 78572ba468 Added register barriers to LOOPE and LOOPNE. Fixes crash in Age of Empires II. SarahW 2019-03-30 21:01:20 +00:00
  • 12d73e8a95 Fix zero sized recompiled shifts. Fixes hang in Gunmetal. SarahW 2019-03-30 19:45:29 +00:00
  • e8f39da459 Add recompiled versions of ROL and ROR. SarahW 2019-03-30 16:10:00 +00:00
  • e2a1ae696f Added lazy flags for ROL and ROR. SarahW 2019-03-30 14:41:02 +00:00
  • 8b197e22da Improved interpreter implementations of ROL and ROR. SarahW 2019-03-29 21:06:01 +00:00
  • b77bce1efd Clear page_mask2 when the second page in a block is inaccessible. SarahW 2019-03-28 20:38:33 +00:00
  • efef231d7d Restore correct CS value when aborting in stack operations in CALL far instructions. SarahW 2019-03-28 20:37:55 +00:00
  • 56a01a0e04 Provide dummy timing for unknown (usually illegal) opcodes in K6 timing code. SarahW 2019-03-26 22:02:00 +00:00
  • 61722f120c Fix block mask calculation. Fixes rendering errors in Blood. SarahW 2019-03-25 19:59:46 +00:00
  • 7e099c277e Added basic loop unrolling. Blocks that end in a JMP, LOOP or conditional branch to a previous instruction in the block will be unrolled up to 10 times. SarahW 2019-03-25 19:07:51 +00:00
  • b35cf7de09 Fix codegen timing flush at end of a block. SarahW 2019-03-22 20:31:57 +00:00
  • 52f5f43d82 Fix PC value following FSTCW/FSTSW. SarahW 2019-03-22 20:31:29 +00:00
  • 4b99070fc0 Flush accumulators before call to non-recompiled instruction. SarahW 2019-03-16 15:47:49 +00:00
  • cd9e228b6d Move CODEBLOCK_IN_DIRTY_LIST check to after checking if block needs to be flushed. Improves performance in Eradicator. SarahW 2019-03-16 15:46:48 +00:00
  • ab124776a0 Rework self modifying code handling. SarahW 2019-03-16 14:53:26 +00:00
  • 063ffb4eab Update Makefile.mingw-wx-sdl2. SarahW 2019-02-14 19:39:47 +00:00
  • 01e86135ab Tweak FDC command timing and add register access waitstates. Fixes floppy in Windows 98 with VA-503. SarahW 2019-02-13 22:12:53 +00:00
  • a73081f0bd Fix ARM and ARM64 build errors. SarahW 2019-02-13 21:11:27 +00:00
  • 3f2d9ecf87 Optimise out redundant uOPs, where the output register is never read. SarahW 2019-02-10 12:32:25 +00:00
  • 84622584e2 Move CPU tables to separate file. SarahW 2019-02-08 21:34:02 +00:00
  • ce4436054d Replace cpu_has* flags with single cpu_features variable and cpu_has_feature() getter. SarahW 2019-02-08 21:22:53 +00:00
  • 03b5a44aca More CPU sanitisation. SarahW 2019-02-08 21:17:56 +00:00
  • 2554952658 Remove unused checkio_perm() macro. SarahW 2019-02-08 19:36:30 +00:00
  • 5b58b202a1 More CPU sanitisation. SarahW 2019-02-07 22:10:34 +00:00
  • 1b8a1e79af Move common 386+ functions and variables out of 386.c and 386_dynarec.c and into new 386_common.c. SarahW 2019-02-07 22:09:59 +00:00
  • dd68b19f0a Second CPU sanitising pass. SarahW 2019-02-07 21:53:44 +00:00
  • 1af0b660b3 First pass at sanitising CPU headers. SarahW 2019-02-07 21:30:53 +00:00
  • 2735920f58 De-duplicate allocation code in mem_init(). SarahW 2019-02-07 20:34:06 +00:00
  • 3c2dbf063e Remove unused and superfluous variables from mem.c. SarahW 2019-02-07 20:23:14 +00:00
  • 5edc23a602 Reduce number of massive static arrays in mem.c. SarahW 2019-02-07 20:21:39 +00:00
  • 87031d4d09 Remove readmemb386l() and writememb386l(). SarahW 2019-02-07 20:18:03 +00:00
  • d4d6a26283 Added recompiled versions of ADC and SBC. SarahW 2019-02-06 21:07:45 +00:00
  • 222071b742 ADC and SBC now use lazy flags. SarahW 2019-02-05 21:54:38 +00:00
  • b105445a52 Correct Voodoo hvRetrace register. Fixes intermittent hangs on Voodoo mode setting. SarahW 2019-02-04 21:32:25 +00:00
  • d66731f85a In codegen_ir_compile(), rearrange order of register lookups and order barrier flushing to reduce pointless writes of temporary registers. SarahW 2019-02-03 21:35:24 +00:00
  • 095cf53265 Added segment limit checking to some instructions. SarahW 2019-02-03 17:48:11 +00:00
  • 4c523a5fe2 Split x86 and x86-64 ops files into main/FPU/SSE files. SarahW 2019-02-02 19:20:42 +00:00
  • 9a6376dbf9 Clear codeblock physical addresses when resetting codegen. Fixes out-of-bounds accesses to the pages[] array during reset. SarahW 2019-02-02 13:46:06 +00:00
  • 2ccf771cf3 Cleaned up exec386_dynarec() a bit. SarahW 2019-02-01 20:11:08 +00:00
  • 9060f4552f Remove fake 3-operand instructions in x86-64 backend. SarahW 2019-01-28 21:56:57 +00:00
  • e822460f33 Fix missing function prototypes in codegen_backend_x86-64_ops.h. SarahW 2019-01-28 21:22:03 +00:00
  • 9283ab5fef Hide fatal()s in codegen_backend_x86-64_uops.c behind a RECOMPILER_DEBUG #define. SarahW 2019-01-28 21:21:47 +00:00
  • b018dc1005 Remove fake 3-operand instructions in x86 backend. SarahW 2019-01-28 21:08:01 +00:00
  • f0225d2710 Hide fatal()s in codegen_backend_x86_uops.c behind a RECOMPILER_DEBUG #define. SarahW 2019-01-28 20:30:08 +00:00
  • ca89a51478 Remove redundant oldcs variable - when processing an exception, oldcs and CS are the same. SarahW 2019-01-28 20:00:49 +00:00
  • 427aa72a15 Don't set cpu_state.oldpc at the start of every iteration of the recompiler main loop. SarahW 2019-01-28 19:25:09 +00:00
  • 6e5336ae56 When compiling with CODEBLOCK_STATIC_TOP, update TOP register with immediate moves rather than add/sub. SarahW 2019-01-28 17:40:28 +00:00
  • 32d4f4c765 Fix incorrect PC size detection on LOOP/LOOPE/LOOPNE/JCXZ/JECXZ. Fixes Heaven 7. SarahW 2019-01-27 22:21:06 +00:00
  • 889ca7f3f2 Remove test-USE32-and-mask-PC operation from interpreter as well. SarahW 2019-01-27 21:22:35 +00:00
  • ee186dbb0d Remove test-USE32-and-mask-PC operation following code block execution. Instead, ensure that all recompiled instructions mask PC correctly. SarahW 2019-01-27 20:54:22 +00:00
  • 7b3b6a745d Remove pointless NULL check against block in recompiler loop. SarahW 2019-01-27 20:52:59 +00:00
  • 6c65c34bd3 Don't clear trap at the start of the recompiler loop; instead, clear it when actually taking a trap. SarahW 2019-01-27 20:52:37 +00:00
  • 93b42d43d5 Remove pointless setting of cpu_state.op32 and cycdiff at start of recompiler main loop. SarahW 2019-01-27 20:52:02 +00:00
  • c3250ca63e Don't set oldcpl at the start of each instruction; instead, only set it following a successful CS load. SarahW 2019-01-27 20:51:13 +00:00
  • d461bc7cda Fix invalid page check in get_phys_noabrt(). SarahW 2019-01-24 20:36:20 +00:00
  • c1f0b7c35d Use readlookup cache in get_phys(). SarahW 2019-01-22 21:41:00 +00:00
  • ec18c8a2fb Implement more intelligent out-of-memory algorithm. SarahW 2019-01-21 21:52:32 +00:00
  • bf392ffd3a Maintain a list of free code blocks, and allocate new blocks from the list rather than evicting at random. Also maintain a list of memory pages with dirty code blocks that can be evicted. This allows the recompiler to evict dirty blocks in preference to freeing usable blocks when the free list is empty. Increase the number of available code blocks on x86. Increase the non-ARM code allocator memory to 128 MB. This reduces the amount of code block churning when running software with a lot of code, eg Windows XP. SarahW 2019-01-19 21:54:14 +00:00
  • c07a3b5311 Free currently allocated memory blocks on CPU reset. Prevents memory leaks when resetting. SarahW 2019-01-19 18:08:45 +00:00
  • 9c595f4b9b Add CMPXCHG8B to the K6 timing model. SarahW 2019-01-19 18:06:14 +00:00
  • 57579cdd07 Add dummy USB and ACPI implementations to VT82C586B. Windows 2000 and XP now work on FIC VA-503+. SarahW 2019-01-19 18:05:27 +00:00
  • 13087d0031 Added missing codegen allocator files SarahW 2019-01-17 18:05:27 +00:00
  • 178c9d5c15 Don't write back temporary registers if they won't be read again. SarahW 2019-01-16 21:54:10 +00:00
  • cc4118fca0 Remove duplicate i430hx.c in Makefile.am SarahW 2019-01-16 18:33:27 +00:00
  • 140903f4cb Tweaked S3 ViRGE clipping. Based on patch from rene. SarahW 2019-01-15 21:33:24 +00:00
  • 2c5824f2cd Added ASUS P/I-P55T2P4 emulation, along with i430HX chipset emulation. Patch from Martin_Riarte. SarahW 2019-01-15 20:00:17 +00:00
  • 1ddcbdaf4c Added emulation of CGA 3d8h bit 3 (display enable). SarahW 2019-01-13 22:12:39 +00:00
  • ac886c420f Increase ARMv7 and v8 code block count to the normal default of 16384, now that this no longer leads to a massive increase in memory usage. SarahW 2019-01-13 12:58:07 +00:00
  • 8998024225 Move GPF and early exit routines out of individual code blocks and into the common helper block. SarahW 2019-01-13 12:57:32 +00:00
  • f4f9695ca9 Added Zenith Data SupersPort. Based on patch from Tux. SarahW 2019-01-12 18:33:19 +00:00
  • 9efd6705ae Added ASUS P/I-P55TVP4 and Epox P55-VA. Patch from Martin_Riarte. SarahW 2019-01-12 17:24:33 +00:00
  • d32157306d Use consistent capitalisation of TGUI 9400CXi BIOS file name. Patch from Martin_Riarte. SarahW 2019-01-12 16:54:32 +00:00
  • 7fcb437f29 Fixed index into RTC days_in_month tables. Patch from Tale. SarahW 2019-01-12 16:49:44 +00:00
  • 966e74261b Update Makefile.am. SarahW 2019-01-12 15:17:11 +00:00
  • 68464d6e81 Fix 3DNow build issues on ARM platforms. SarahW 2019-01-12 15:16:03 +00:00
  • 66fba50e06 Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7. The current design does not allow for ARMv8 literal pools, therefore these have been removed. SarahW 2019-01-12 15:15:43 +00:00
  • 56a4d5cf83 Use correct rounding mode on x86 and x86-64 recompiled versions of PF2ID. Fixes rendering errors on Unreal 3DNow! software renderer SarahW 2019-01-10 21:33:29 +00:00
  • 8ee9b07ab2 Added decoder length limitations to K6 timing model SarahW 2019-01-06 14:23:23 +00:00
  • 3c7d1b1204 Ensure that taken jump/branch instructions do not count as 0 cycles. Fixes Windows 95 hang with K6. SarahW 2019-01-06 13:46:17 +00:00
  • 1953f4afb9 Use mmap() to allocate codeblock memory on x86-64 when not running on Windows. SarahW 2018-12-19 22:25:47 +00:00
  • c86b919ed8 Fix writemem functions on x86-64 when !WIN64. SarahW 2018-12-19 22:24:40 +00:00
  • 93a5925f02 Use MOVZX on x86-64 when loading a word sized function parameter. Fixes issues when built with LLVM and -O3. SarahW 2018-12-19 22:23:59 +00:00
  • b26432caa8 When allocating a read register, prioritise registers that will not be used again. SarahW 2018-12-17 19:40:09 +00:00
  • e8483acea5 Search through all host integer and FP registers when allocating registers. SarahW 2018-12-17 19:36:54 +00:00
  • e26abe7a1f Added recompiled versions of 3DNow instructions - PF2ID, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQRT, PFRSQIT1, PFSUB, PFSUBR and PI2FD. SarahW 2018-12-14 21:59:03 +00:00
  • cfd4ac3a4f Added initial timing model for K6 CPUs. SarahW 2018-12-09 22:17:11 +00:00