Retro/pcem
Watch
1
0
Fork
You've already forked pcem
 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

In codegen_ir_compile(), rearrange order of register lookups and order barrier flushing to reduce pointless writes of temporary registers.

Browse source
This commit is contained in:
SarahW 2019-02-03 21:35:24 +00:00
commit d66731f85a
1 changed files with 7 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

9
src/codegen_ir.c
View file

@ -33,8 +33,6 @@ void codegen_ir_compile(ir_data_t *ir, codeblock_t *block)
if (uop->type & UOP_TYPE_BARRIER)
codegen_reg_flush_invalidate(ir, block);
else if (uop->type & UOP_TYPE_ORDER_BARRIER)
codegen_reg_flush(ir, block);
if (uop->type & UOP_TYPE_JUMP_DEST)
{
@ -62,6 +60,13 @@ void codegen_ir_compile(ir_data_t *ir, codeblock_t *block)
{
uop->src_reg_c_real = codegen_reg_alloc_read_reg(block, uop->src_reg_c, NULL);
}
}
if (uop->type & UOP_TYPE_ORDER_BARRIER)
codegen_reg_flush(ir, block);
if (uop->type & UOP_TYPE_PARAMS_REGS)
{
if (uop->dest_reg_a.reg != IREG_INVALID)
{
uop->dest_reg_a_real = codegen_reg_alloc_write_reg(block, uop->dest_reg_a);