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Remove readmemb386l() and writememb386l().

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This commit is contained in:
SarahW 2019-02-07 20:18:03 +00:00
commit 87031d4d09
7 changed files with 17 additions and 72 deletions
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8
src/386_common.h
View file

@ -4,10 +4,10 @@ extern uint16_t ea_rseg;
#undef writememb
#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1)?readmemb386l((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) )
#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) )
#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1) writememb386l((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
@ -225,11 +225,11 @@ static inline void seteaq(uint64_t v)
writememql(easeg+cpu_state.eaaddr, v);
}
#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg+cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v
#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v
#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v
#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v
#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg+cpu_state.eaaddr,v);
#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v);
#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v);
#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v);

2
src/386_dynarec.c
View file

@ -428,7 +428,7 @@ int checkio(int port)
// pclog("CheckIO %04X %01X %01X %02X %04X %04X %08X ",CS,CPL,IOPL,port,t,t+(port>>3),tr.base+t+(port>>3));
if ((t+(port>>3))>tr.limit) return 1;
cpl_override = 1;
d = readmemb386l(tr.base + t + (port >> 3));
d = readmembl(tr.base + t + (port >> 3));
// d=readmemb(tr.base,t+(port>>3));
cpl_override = 0;
// pclog("%02X %02X\n",d,d&(1<<(port&7)));

2
src/808x.c
View file

@ -529,7 +529,7 @@ void dumpregs()
for (c=0;c<0x0050000;c++)
{
cpu_state.abrt = 0;
putc(readmemb386l(c+0x80000000),f);
putc(readmembl(c+0x80000000),f);
}
fclose(f);
pclog("Dumping done\n");

8
src/codegen_backend_x86-64.c
View file

@ -71,7 +71,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
* PUSH EAX
PUSH EDX
PUSH ECX
CALL readmemb386l
CALL readmembl
POP ECX
POP EDX
POP EAX
@ -117,7 +117,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
#endif
if (size == 1 && !is_float)
{
host_x86_CALL(block, (void *)readmemb386l);
host_x86_CALL(block, (void *)readmembl);
host_x86_MOVZX_REG_32_8(block, REG_ECX, REG_EAX);
}
else if (size == 2 && !is_float)
@ -169,7 +169,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float)
* PUSH EAX
PUSH EDX
PUSH ECX
CALL writememb386l
CALL writemembl
POP ECX
POP EDX
POP EAX
@ -227,7 +227,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float)
host_x86_MOV32_REG_REG(block, REG_ESI, REG_ECX); //data
#endif
if (size == 1)
host_x86_CALL(block, (void *)writememb386l);
host_x86_CALL(block, (void *)writemembl);
else if (size == 2)
host_x86_CALL(block, (void *)writememwl);
else if (size == 4)

8
src/codegen_backend_x86.c
View file

@ -71,7 +71,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
* PUSH EAX
PUSH EDX
PUSH ECX
CALL readmemb386l
CALL readmembl
POP ECX
POP EDX
POP EAX
@ -110,7 +110,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
host_x86_PUSH(block, REG_EDX);
host_x86_PUSH(block, REG_ECX);
if (size == 1)
host_x86_CALL(block, (void *)readmemb386l);
host_x86_CALL(block, (void *)readmembl);
else if (size == 2)
host_x86_CALL(block, (void *)readmemwl);
else if (size == 4)
@ -161,7 +161,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float)
* PUSH EAX
PUSH EDX
PUSH ECX
CALL writememb386l
CALL writemembl
POP ECX
POP EDX
POP EAX
@ -208,7 +208,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float)
}
host_x86_PUSH(block, REG_EDI);
if (size == 1)
host_x86_CALL(block, (void *)writememb386l);
host_x86_CALL(block, (void *)writemembl);
else if (size == 2)
host_x86_CALL(block, (void *)writememwl);
else if (size == 4)

2
src/ibm.h
View file

@ -45,8 +45,6 @@ extern int mmu_perm;
//void writememb(uint32_t addr, uint8_t val);
uint8_t readmembl(uint32_t addr);
void writemembl(uint32_t addr, uint8_t val);
uint8_t readmemb386l(uint32_t addr);
void writememb386l(uint32_t addr, uint8_t val);
uint16_t readmemwl(uint32_t addr);
void writememwl(uint32_t addr, uint16_t val);
uint32_t readmemll(uint32_t addr);

59
src/mem.c
View file

@ -497,50 +497,6 @@ void writemembl(uint32_t addr, uint8_t val)
// else pclog("Bad writemembl %08X %02X %04X:%08X\n", addr, val, CS, pc);
}
uint8_t readmemb386l(uint32_t addr)
{
mem_logical_addr = addr;
/* if (readlookup2[mem_logical_addr >> 12] != 0xFFFFFFFF)
{
return ram[readlookup2[mem_logical_addr >> 12] + (mem_logical_addr & 0xFFF)];
}*/
if (cr0 >> 31)
{
addr = mmutranslate_read(addr);
if (addr == 0xFFFFFFFF) return 0xFF;
}
addr &= rammask;
if (_mem_read_b[addr >> 14]) return _mem_read_b[addr >> 14](addr, _mem_priv_r[addr >> 14]);
// pclog("Bad readmemb386l %08X %04X:%08X\n", addr, CS, pc);
return 0xFF;
}
void writememb386l(uint32_t addr, uint8_t val)
{
mem_logical_addr = addr;
if (page_lookup[addr>>12])
{
page_lookup[addr>>12]->write_b(addr, val, page_lookup[addr>>12]);
return;
}
if (cr0 >> 31)
{
addr = mmutranslate_write(addr);
if (addr == 0xFFFFFFFF) return;
}
addr &= rammask;
/* if (addr >= 0xa0000 && addr < 0xc0000)
pclog("writemembl %08X %02X\n", addr, val);*/
if (_mem_write_b[addr >> 14]) _mem_write_b[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
// else pclog("Bad writememb386l %08X %02X %04X:%08X\n", addr, val, CS, pc);
}
uint16_t readmemwl(uint32_t addr)
{
mem_logical_addr = addr;
@ -556,8 +512,7 @@ uint16_t readmemwl(uint32_t addr)
if (mmutranslate_read(addr) == 0xffffffff) return 0xffff;
if (mmutranslate_read(addr+1) == 0xffffffff) return 0xffff;
}
if (is386) return readmemb386l(addr)|(readmemb386l(addr+1)<<8);
else return readmembl(addr)|(readmembl(addr+1)<<8);
return readmembl(addr)|(readmembl(addr+1)<<8);
}
else if (readlookup2[addr >> 12] != -1)
return *(uint16_t *)(readlookup2[addr >> 12] + addr);
@ -594,16 +549,8 @@ void writememwl(uint32_t addr, uint16_t val)
if (mmutranslate_write(addr) == 0xffffffff) return;
if (mmutranslate_write(addr+1) == 0xffffffff) return;
}
if (is386)
{
writememb386l(addr,val);
writememb386l(addr+1,val>>8);
}
else
{
writemembl(addr,val);
writemembl(addr+1,val>>8);
}
writemembl(addr,val);
writemembl(addr+1,val>>8);
return;
}
else if (writelookup2[addr >> 12] != -1)