Fix 3DNow build issues on ARM platforms.
This commit is contained in:
parent
66fba50e06
commit
68464d6e81
5 changed files with 65 additions and 46 deletions
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@ -167,6 +167,7 @@
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#define OPCODE_SADDLP_V2S_4H (0x0e602800)
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#define OPCODE_SCVTF_D_Q (0x9e620000)
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#define OPCODE_SCVTF_D_W (0x1e620000)
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#define OPCODE_SCVTF_V2S (0x0e21d800)
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#define OPCODE_SQADD_V8B (0x0e200c00)
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#define OPCODE_SQADD_V4H (0x0e600c00)
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#define OPCODE_SQSUB_V8B (0x0e202c00)
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@ -1105,6 +1106,11 @@ void host_arm64_SCVTF_D_W(codeblock_t *block, int dst_reg, int src_reg)
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codegen_addlong(block, OPCODE_SCVTF_D_W | Rd(dst_reg) | Rn(src_reg));
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}
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void host_arm64_SCVTF_V2S(codeblock_t *block, int dst_reg, int src_reg)
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{
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codegen_addlong(block, OPCODE_SCVTF_V2S | Rd(dst_reg) | Rn(src_reg));
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}
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void host_arm64_SHRN_V4H_4S(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
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{
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if (shift > 16)
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@ -1696,12 +1696,12 @@ static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFADD(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FADD_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FADD_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1710,12 +1710,12 @@ static int codegen_PFADD(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FCMEQ_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FCMEQ_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFCMPEQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1724,12 +1724,12 @@ static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FCMGE_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FCMGE_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFCMPGE %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1738,12 +1738,12 @@ static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FCMGT_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FCMGT_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFCMPGT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1752,12 +1752,12 @@ static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FMAX_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FMAX_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFMAX %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1766,12 +1766,12 @@ static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FMIN_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FMIN_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFMIN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1780,12 +1780,12 @@ static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
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}
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static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
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{
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
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int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FMUL_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FMUL_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -1800,9 +1800,9 @@ static int codegen_PFRCP(codeblock_t *block, uop_t *uop)
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
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{
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/*TODO: This could be improved (use VRECPE/VRECPS)*/
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host_arm_FMOV_S_ONE(block, REG_D_TEMP);
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host_arm_FDIV_S(block, dest_reg, REG_D_TEMP, src_reg_a);
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host_arm_DUP_V2S(block, dest_reg, dest_reg, 0);
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host_arm64_FMOV_S_ONE(block, REG_V_TEMP);
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host_arm64_FDIV_S(block, dest_reg, REG_V_TEMP, src_reg_a);
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host_arm64_DUP_V2S(block, dest_reg, dest_reg, 0);
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}
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else
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fatal("PFRCP %02x %02x\n", uop->dest_reg_a_real);
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@ -1817,10 +1817,10 @@ static int codegen_PFRSQRT(codeblock_t *block, uop_t *uop)
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
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{
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/*TODO: This could be improved (use VRSQRTE/VRSQRTS)*/
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host_arm_FSQRT_S(block, REG_D_TEMP, src_reg_a);
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host_arm_FMOV_S_ONE(block, REG_D_TEMP);
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host_arm_FDIV_S(block, dest_reg, dest_reg, REG_D_TEMP);
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host_arm_DUP_V2S(block, dest_reg, dest_reg, 0);
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host_arm64_FSQRT_S(block, REG_V_TEMP, src_reg_a);
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host_arm64_FMOV_S_ONE(block, REG_V_TEMP);
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host_arm64_FDIV_S(block, dest_reg, dest_reg, REG_V_TEMP);
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host_arm64_DUP_V2S(block, dest_reg, dest_reg, 0);
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}
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else
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fatal("PFRSQRT %02x %02x\n", uop->dest_reg_a_real);
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@ -1834,7 +1834,7 @@ static int codegen_PFSUB(codeblock_t *block, uop_t *uop)
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if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
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{
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host_arm_FSUB_V2S(block, dest_reg, src_reg_a, src_reg_b);
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host_arm64_FSUB_V2S(block, dest_reg, src_reg_a, src_reg_b);
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}
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else
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fatal("PFSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
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@ -96,8 +96,9 @@
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#define OPCODE_VCMP_D 0xeeb40b40
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#define OPCODE_VCVT_D_IS 0xeeb80bc0
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#define OPCODE_VCVT_D_S 0xeeb70ac0
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#define OPCODE_VCVT_F32_S32 0xf3bb0700
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#define OPCODE_VCVT_IS_D 0xeebd0bc0
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#define OPCODE_VCVT_S32_F32 0xf3bb0680
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#define OPCODE_VCVT_S32_F32 0xf3bb0600
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#define OPCODE_VCVT_S_D 0xeeb70bc0
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#define OPCODE_VCVTR_IS_D 0xeebd0b40
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#define OPCODE_VDIV 0xee800b00
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@ -156,6 +157,7 @@
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#define OPCODE_VSUB_I8 0xf3000800
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#define OPCODE_VSUB_I16 0xf3100800
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#define OPCODE_VSUB_I32 0xf3200800
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#define OPCODE_VSUB_F32 0xf3000d00
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#define OPCODE_VZIP_D8 0xf3b20180
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#define OPCODE_VZIP_D16 0xf3b60180
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#define OPCODE_VZIP_D32 0xf3ba0080
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@ -932,6 +934,10 @@ void host_arm_VCVT_D_S(codeblock_t *block, int dest_reg, int src_reg)
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{
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codegen_addlong(block, COND_AL | OPCODE_VCVT_D_S | Vd(dest_reg) | Vm(src_reg));
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}
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void host_arm_VCVT_F32_S32(codeblock_t *block, int dest_reg, int src_reg)
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{
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codegen_addlong(block, COND_AL | OPCODE_VCVT_F32_S32 | Vd(dest_reg) | Vm(src_reg));
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}
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void host_arm_VCVT_IS_D(codeblock_t *block, int dest_reg, int src_reg)
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{
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codegen_addlong(block, COND_AL | OPCODE_VCVT_IS_D | Vd(dest_reg) | Vm(src_reg));
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@ -1006,7 +1012,7 @@ void host_arm_VMOVN_I64(codeblock_t *block, int dest_reg, int src_reg)
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}
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void host_arm_VMOV_F32_ONE(codeblock_t *block, int dst_reg)
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{
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codegen_addlong(block, COND_AL | OPCODE_VMOV_F32_ONE | Rd(src_reg));
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codegen_addlong(block, COND_AL | OPCODE_VMOV_F32_ONE | Rd(dst_reg));
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}
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void host_arm_VMSR_FPSCR(codeblock_t *block, int src_reg)
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{
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@ -1198,6 +1204,10 @@ void host_arm_VSUB_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg
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{
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codegen_addlong(block, COND_AL | OPCODE_VSUB | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
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}
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void host_arm_VSUB_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
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{
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codegen_addlong(block, COND_AL | OPCODE_VSUB_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
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}
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void host_arm_VSUB_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
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{
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codegen_addlong(block, OPCODE_VSUB_I8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
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@ -166,12 +166,14 @@ void host_arm_VCHS_D(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_D_IS(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_D_S(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_F32_S32(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_IS_D(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_S32_F32(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVT_S_D(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VCVTR_IS_D(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VDIV_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
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void host_arm_VDIV_S(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
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void host_arm_VDUP_32(codeblock_t *block, int dst_reg, int src_reg_m, int imm);
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void host_arm_VEOR_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
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void host_arm_VLDR_D(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm_VLDR_S(codeblock_t *block, int dest_reg, int base_reg, int offset);
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@ -235,6 +237,7 @@ void host_arm_VSQRT_S(codeblock_t *block, int dest_reg, int src_reg);
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void host_arm_VSTR_D(codeblock_t *block, int src_reg, int base_reg, int offset);
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void host_arm_VSTR_S(codeblock_t *block, int src_reg, int base_reg, int offset);
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void host_arm_VSUB_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
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void host_arm_VSUB_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
|
||||
void host_arm_VSUB_S(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
|
||||
void host_arm_VSUB_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
|
||||
void host_arm_VSUB_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
|
||||
|
|
|
|||
|
|
@ -1823,8 +1823,8 @@ static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFADD(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1837,8 +1837,8 @@ static int codegen_PFADD(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1851,8 +1851,8 @@ static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1865,8 +1865,8 @@ static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1879,8 +1879,8 @@ static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1893,8 +1893,8 @@ static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1907,8 +1907,8 @@ static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
|
|||
}
|
||||
static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
|
||||
{
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
|
||||
int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
|
||||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
|
||||
{
|
||||
|
|
@ -1975,7 +1975,7 @@ static int codegen_PI2FD(codeblock_t *block, uop_t *uop)
|
|||
|
||||
if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
|
||||
{
|
||||
host_arm_VCVT_Q_F32_IS(block, dest_reg, src_reg_a);
|
||||
host_arm_VCVT_F32_S32(block, dest_reg, src_reg_a);
|
||||
}
|
||||
else
|
||||
fatal("PI2FD %02x %02x\n", uop->dest_reg_a_real);
|
||||
|
|
|
|||
Loading…
Reference in a new issue