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Author SHA1 Message Date
SarahW
f0225d2710 Hide fatal()s in codegen_backend_x86_uops.c behind a RECOMPILER_DEBUG #define. 2019-01-28 20:30:08 +00:00
SarahW
ca89a51478 Remove redundant oldcs variable - when processing an exception, oldcs and CS are the same. 2019-01-28 20:00:49 +00:00
SarahW
427aa72a15 Don't set cpu_state.oldpc at the start of every iteration of the recompiler main loop. 2019-01-28 19:25:09 +00:00
SarahW
6e5336ae56 When compiling with CODEBLOCK_STATIC_TOP, update TOP register with immediate moves rather than add/sub. 2019-01-28 17:40:28 +00:00
SarahW
32d4f4c765 Fix incorrect PC size detection on LOOP/LOOPE/LOOPNE/JCXZ/JECXZ. Fixes Heaven 7. 2019-01-27 22:21:06 +00:00
SarahW
889ca7f3f2 Remove test-USE32-and-mask-PC operation from interpreter as well. 2019-01-27 21:22:35 +00:00
SarahW
ee186dbb0d Remove test-USE32-and-mask-PC operation following code block execution. Instead, ensure that all recompiled instructions mask PC correctly. 2019-01-27 20:54:22 +00:00
SarahW
7b3b6a745d Remove pointless NULL check against block in recompiler loop. 2019-01-27 20:52:59 +00:00
SarahW
6c65c34bd3 Don't clear trap at the start of the recompiler loop; instead, clear it when actually taking a trap. 2019-01-27 20:52:37 +00:00
SarahW
93b42d43d5 Remove pointless setting of cpu_state.op32 and cycdiff at start of recompiler main loop. 2019-01-27 20:52:02 +00:00
SarahW
c3250ca63e Don't set oldcpl at the start of each instruction; instead, only set it following a successful CS load. 2019-01-27 20:51:13 +00:00
SarahW
d461bc7cda Fix invalid page check in get_phys_noabrt(). 2019-01-24 20:36:20 +00:00
SarahW
c1f0b7c35d Use readlookup cache in get_phys(). 2019-01-22 21:41:00 +00:00
SarahW
ec18c8a2fb Implement more intelligent out-of-memory algorithm. 2019-01-21 21:52:32 +00:00
SarahW
bf392ffd3a Maintain a list of free code blocks, and allocate new blocks from the list rather than evicting at random. 
Also maintain a list of memory pages with dirty code blocks that can be evicted. This allows the recompiler to evict dirty blocks in preference to freeing usable blocks when the free list is empty.
Increase the number of available code blocks on x86.
Increase the non-ARM code allocator memory to 128 MB.
This reduces the amount of code block churning when running software with a lot of code, eg Windows XP.
 2019-01-19 21:54:14 +00:00
SarahW
c07a3b5311 Free currently allocated memory blocks on CPU reset. Prevents memory leaks when resetting. 2019-01-19 18:08:45 +00:00
SarahW
9c595f4b9b Add CMPXCHG8B to the K6 timing model. 2019-01-19 18:06:14 +00:00
SarahW
57579cdd07 Add dummy USB and ACPI implementations to VT82C586B. Windows 2000 and XP now work on FIC VA-503+. 2019-01-19 18:05:27 +00:00
SarahW
13087d0031 Added missing codegen allocator files 2019-01-17 18:05:27 +00:00
SarahW
178c9d5c15 Don't write back temporary registers if they won't be read again. 2019-01-16 21:54:10 +00:00
SarahW
ac886c420f Increase ARMv7 and v8 code block count to the normal default of 16384, now that this no longer leads to a massive increase in memory usage. 2019-01-13 12:58:07 +00:00
SarahW
8998024225 Move GPF and early exit routines out of individual code blocks and into the common helper block. 2019-01-13 12:57:32 +00:00
SarahW
966e74261b Update Makefile.am. 2019-01-12 15:17:11 +00:00
SarahW
68464d6e81 Fix 3DNow build issues on ARM platforms. 2019-01-12 15:16:03 +00:00
SarahW
66fba50e06 Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7. 
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
 2019-01-12 15:15:43 +00:00
SarahW
56a4d5cf83 Use correct rounding mode on x86 and x86-64 recompiled versions of PF2ID. Fixes rendering errors on Unreal 3DNow! software renderer 2019-01-10 21:33:29 +00:00
SarahW
8ee9b07ab2 Added decoder length limitations to K6 timing model 2019-01-06 14:23:23 +00:00
SarahW
3c7d1b1204 Ensure that taken jump/branch instructions do not count as 0 cycles. Fixes Windows 95 hang with K6. 2019-01-06 13:46:17 +00:00
SarahW
1953f4afb9 Use mmap() to allocate codeblock memory on x86-64 when not running on Windows. 2018-12-19 22:25:47 +00:00
SarahW
c86b919ed8 Fix writemem functions on x86-64 when !WIN64. 2018-12-19 22:24:40 +00:00
SarahW
93a5925f02 Use MOVZX on x86-64 when loading a word sized function parameter. Fixes issues when built with LLVM and -O3. 2018-12-19 22:23:59 +00:00
SarahW
b26432caa8 When allocating a read register, prioritise registers that will not be used again. 2018-12-17 19:40:09 +00:00
SarahW
e8483acea5 Search through all host integer and FP registers when allocating registers. 2018-12-17 19:36:54 +00:00
SarahW
e26abe7a1f Added recompiled versions of 3DNow instructions - PF2ID, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQRT, PFRSQIT1, PFSUB, PFSUBR and PI2FD. 2018-12-14 21:59:03 +00:00
SarahW
cfd4ac3a4f Added initial timing model for K6 CPUs. 2018-12-09 22:17:11 +00:00
SarahW
fd10fdd372 Fix ATCLK timings on Winchip 2 CPUs. 2018-12-06 20:02:51 +00:00
SarahW
a9541dadea Added preliminary emulation of AMD K6 CPUs. 2018-12-06 20:02:35 +00:00
SarahW
7ec6f1e4ce Added Winchip 2 timing model. 2018-12-05 20:54:56 +00:00
SarahW
9b8b6c2c70 Add Winchip 2A CPUs. 2018-12-04 21:35:51 +00:00
SarahW
ca39b51803 Fix address calculation on PCMPEQD and PCMPGTD. 2018-12-04 21:35:26 +00:00
SarahW
da2d819ed4 Added WinChip 2 emulation, along with (currently non-recompiled) 3DNow! instruction emulation. 2018-12-03 21:59:41 +00:00
SarahW
5043cff3f9 Move SFF-8038i IDE bus mastering code out of PIIX files. 
Add bus mastering to VT82C586B emulation.
 2018-12-02 15:46:28 +00:00
SarahW
99ca11d148 Added initial emulation of FIC VA-503+ (Super 7). 
This includes preliminary emulation of the VIA MVP3 northbridge, VT82C586B 'PIPC' southbridge, and Winbond W83877TF SuperIO chip.
 2018-12-02 12:38:31 +00:00
SarahW
d5f07a8594 Fix bad use of flags variable in wx-sdl2-display.c. 2018-11-30 13:19:16 +00:00
SarahW
43b5b83644 Reduce codeblock_hash table to uint16_t. 2018-11-30 13:18:56 +00:00
SarahW
9ff1c7f409 Further reductions to codeblock_t size - replace link pointers with uint16_t block indicies, shrink ins to uint8_t, remove endpc. codeblock_t now fits in a 64-byte cacheline on 32-bit platforms. 2018-11-29 20:05:12 +00:00
SarahW
2007c25177 Start reducing size of codeblock_t structure. 
Re-arrange all variables needed to run a block to fit in a single cache line.
 2018-11-28 20:29:48 +00:00
SarahW
d63176e472 Move dynarec code memory out of codeblock structure. 2018-11-28 18:43:40 +00:00
SarahW
356f406b22 Fix codegen pointer register reads. 2018-11-28 18:41:53 +00:00
SarahW
335cea3ee1 Added recompiled versions of PUSHF and PUSHFD. 2018-11-28 15:19:21 +00:00