Commit graph pcem/src/x86_ops_mov_ctrl.h
Author SHA1 Message Date
SarahW
ce4436054d Replace cpu_has* flags with single cpu_features variable and cpu_has_feature() getter. 2019-02-08 21:22:53 +00:00
SarahW
a4d3aa1912 Move flags and eflags variables into cpu_struct. 2018-11-28 09:42:04 +00:00
SarahW
717d815604 Tweak flat DS/SS dynarec optimisation, should reduce block churn when routines are called both with and without flat DS/SS.
Fixed incorrect STACK32 flag when entering V86 mode that was hidden by block churn.
Protected and V86 mode status now considered when selecting block.
2017-11-15 21:55:27 +00:00
SarahW
1b73963997 Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing. 2016-11-25 21:32:02 +00:00
SarahW
c664682758 Move some more variables into cpu_state structure. Minor speedup (~2%). 2016-08-17 21:28:16 +01:00
SarahW
535604b760 Pack decoded ModR/M data into a single word - minor recompiler speedup. 2016-08-14 16:29:54 +01:00
SarahW
c81a91fd72 Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%). 2016-04-20 21:39:41 +01:00
TomW
28a2336aae MOV DRx now loads/stores from 'dummy' DRx registers (BeOS). 2015-05-03 14:42:34 +01:00
TomW
2905c43db8 Cycle counts for recompiled blocks now generated at compile time. 2014-11-12 19:33:49 +00:00
TomW
4676daade4 Initial commit of dynamic recompiler.
Various CPU changes to support dynamic recompiler.
2014-11-05 21:24:16 +00:00
TomW
262b188790 Implemented CR4 register for Winchip. Currently only Time Stamp Disable (TSD) has an effect.
Fixed stupid bug in WRMSR - MSRs can now be written with values other than zero.
2014-08-23 16:28:16 +01:00
TomW
e737d2fa45 Loading a segment register in real mode no longer clears USE32.
CR3 no longer masks values written to it.
Real mode interrupts now take IDT base into account.
Fixes 'huge unreal' mode (flat assembler).
2014-03-29 14:28:13 +00:00
TomW
f822488656 Add missing files from last commit. 2013-05-27 19:56:33 +01:00