Loading a segment register in real mode no longer clears USE32.

CR3 no longer masks values written to it.
Real mode interrupts now take IDT base into account.
Fixes 'huge unreal' mode (flat assembler).
This commit is contained in:
TomW 2014-03-29 14:28:13 +00:00
commit e737d2fa45
4 changed files with 8 additions and 7 deletions

View file

@ -339,7 +339,7 @@ void x86_int(int num)
writememw(ss,((SP-6)&0xFFFF),pc);
SP-=6;
}
addr=num<<2;
addr = (num << 2) + idt.base;
flags&=~I_FLAG;
flags&=~T_FLAG;
@ -376,7 +376,7 @@ void x86_int_sw(int num)
writememw(ss,((SP-6)&0xFFFF),pc);
SP-=6;
}
addr=num<<2;
addr = (num << 2) + idt.base;
flags&=~I_FLAG;
flags&=~T_FLAG;
@ -1343,7 +1343,7 @@ opcodestart:
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,pc);
SP-=6;
addr=1<<2;
addr = (1 << 2) + idt.base;
flags&=~I_FLAG;
flags&=~T_FLAG;
pc=readmemw(0,addr);
@ -1378,7 +1378,7 @@ opcodestart:
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,pc);
SP-=6;
addr=temp<<2;
addr = (temp << 2) + idt.base;
flags&=~I_FLAG;
flags&=~T_FLAG;
oxpc=pc;

View file

@ -639,6 +639,7 @@ void resetx86()
cgate32=0;
loadcs(0xFFFF);
rammask=0xFFFFFFFF;
idt.base = 0;
flags=2;
makeznptable();
initmmucache();
@ -669,6 +670,7 @@ void softresetx86()
loadcs(0xFFFF);
//rammask=0xFFFFFFFF;
flags=2;
idt.base = 0;
}
static void setznp8(uint8_t val)

View file

@ -107,7 +107,7 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
cr2 = regs[rm].l;
break;
case 3:
cr3 = regs[rm].l & ~0xfff;
cr3 = regs[rm].l;
flushmmucache();
break;
default:
@ -140,7 +140,7 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat)
cr2 = regs[rm].l;
break;
case 3:
cr3 = regs[rm].l & ~0xfff;
cr3 = regs[rm].l;
flushmmucache();
break;
default:

View file

@ -308,7 +308,6 @@ void loadseg(uint16_t seg, x86seg *s)
s->seg=seg;
if (eflags&VM_FLAG) s->access=3<<5;
else s->access=0<<5;
use32=0;
if (s==&_ss) stack32=0;
/* if (s==&_ds)
{