Retro/pcem
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1,785 commits 3 branches 0 tags 5.5 MiB
Commit graph pcem/src
Author SHA1 Message Date
SarahW
cc4118fca0 Remove duplicate i430hx.c in Makefile.am 2019-01-16 18:33:27 +00:00
SarahW
140903f4cb Tweaked S3 ViRGE clipping. Based on patch from rene. 2019-01-15 21:33:24 +00:00
SarahW
2c5824f2cd Added ASUS P/I-P55T2P4 emulation, along with i430HX chipset emulation. Patch from Martin_Riarte. 2019-01-15 20:00:17 +00:00
SarahW
1ddcbdaf4c Added emulation of CGA 3d8h bit 3 (display enable). 2019-01-13 22:12:39 +00:00
SarahW
ac886c420f Increase ARMv7 and v8 code block count to the normal default of 16384, now that this no longer leads to a massive increase in memory usage. 2019-01-13 12:58:07 +00:00
SarahW
8998024225 Move GPF and early exit routines out of individual code blocks and into the common helper block. 2019-01-13 12:57:32 +00:00
SarahW
f4f9695ca9 Added Zenith Data SupersPort. Based on patch from Tux. 2019-01-12 18:33:19 +00:00
SarahW
9efd6705ae Added ASUS P/I-P55TVP4 and Epox P55-VA. Patch from Martin_Riarte. 2019-01-12 17:24:33 +00:00
SarahW
d32157306d Use consistent capitalisation of TGUI 9400CXi BIOS file name. Patch from Martin_Riarte. 2019-01-12 16:54:32 +00:00
SarahW
7fcb437f29 Fixed index into RTC days_in_month tables. Patch from Tale. 2019-01-12 16:49:44 +00:00
SarahW
966e74261b Update Makefile.am. 2019-01-12 15:17:11 +00:00
SarahW
68464d6e81 Fix 3DNow build issues on ARM platforms. 2019-01-12 15:16:03 +00:00
SarahW
66fba50e06 Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7. 
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
 2019-01-12 15:15:43 +00:00
SarahW
56a4d5cf83 Use correct rounding mode on x86 and x86-64 recompiled versions of PF2ID. Fixes rendering errors on Unreal 3DNow! software renderer 2019-01-10 21:33:29 +00:00
SarahW
8ee9b07ab2 Added decoder length limitations to K6 timing model 2019-01-06 14:23:23 +00:00
SarahW
3c7d1b1204 Ensure that taken jump/branch instructions do not count as 0 cycles. Fixes Windows 95 hang with K6. 2019-01-06 13:46:17 +00:00
SarahW
1953f4afb9 Use mmap() to allocate codeblock memory on x86-64 when not running on Windows. 2018-12-19 22:25:47 +00:00
SarahW
c86b919ed8 Fix writemem functions on x86-64 when !WIN64. 2018-12-19 22:24:40 +00:00
SarahW
93a5925f02 Use MOVZX on x86-64 when loading a word sized function parameter. Fixes issues when built with LLVM and -O3. 2018-12-19 22:23:59 +00:00
SarahW
b26432caa8 When allocating a read register, prioritise registers that will not be used again. 2018-12-17 19:40:09 +00:00
SarahW
e8483acea5 Search through all host integer and FP registers when allocating registers. 2018-12-17 19:36:54 +00:00
SarahW
e26abe7a1f Added recompiled versions of 3DNow instructions - PF2ID, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQRT, PFRSQIT1, PFSUB, PFSUBR and PI2FD. 2018-12-14 21:59:03 +00:00
SarahW
cfd4ac3a4f Added initial timing model for K6 CPUs. 2018-12-09 22:17:11 +00:00
SarahW
fd10fdd372 Fix ATCLK timings on Winchip 2 CPUs. 2018-12-06 20:02:51 +00:00
SarahW
a9541dadea Added preliminary emulation of AMD K6 CPUs. 2018-12-06 20:02:35 +00:00
SarahW
7ec6f1e4ce Added Winchip 2 timing model. 2018-12-05 20:54:56 +00:00
SarahW
9b8b6c2c70 Add Winchip 2A CPUs. 2018-12-04 21:35:51 +00:00
SarahW
ca39b51803 Fix address calculation on PCMPEQD and PCMPGTD. 2018-12-04 21:35:26 +00:00
SarahW
da2d819ed4 Added WinChip 2 emulation, along with (currently non-recompiled) 3DNow! instruction emulation. 2018-12-03 21:59:41 +00:00
SarahW
5043cff3f9 Move SFF-8038i IDE bus mastering code out of PIIX files. 
Add bus mastering to VT82C586B emulation.
 2018-12-02 15:46:28 +00:00
SarahW
99ca11d148 Added initial emulation of FIC VA-503+ (Super 7). 
This includes preliminary emulation of the VIA MVP3 northbridge, VT82C586B 'PIPC' southbridge, and Winbond W83877TF SuperIO chip.
 2018-12-02 12:38:31 +00:00
SarahW
d5f07a8594 Fix bad use of flags variable in wx-sdl2-display.c. 2018-11-30 13:19:16 +00:00
SarahW
43b5b83644 Reduce codeblock_hash table to uint16_t. 2018-11-30 13:18:56 +00:00
SarahW
9ff1c7f409 Further reductions to codeblock_t size - replace link pointers with uint16_t block indicies, shrink ins to uint8_t, remove endpc. codeblock_t now fits in a 64-byte cacheline on 32-bit platforms. 2018-11-29 20:05:12 +00:00
SarahW
2007c25177 Start reducing size of codeblock_t structure. 
Re-arrange all variables needed to run a block to fit in a single cache line.
 2018-11-28 20:29:48 +00:00
SarahW
d63176e472 Move dynarec code memory out of codeblock structure. 2018-11-28 18:43:40 +00:00
SarahW
356f406b22 Fix codegen pointer register reads. 2018-11-28 18:41:53 +00:00
SarahW
335cea3ee1 Added recompiled versions of PUSHF and PUSHFD. 2018-11-28 15:19:21 +00:00
SarahW
5df3f6caef Added recompiled versions of PUSHA and POPA. 2018-11-28 11:50:24 +00:00
SarahW
e012420f90 Added recompiled versions of CLC, CLD, CLI, CMC, STC, STD and STI. 2018-11-28 09:58:50 +00:00
SarahW
a4d3aa1912 Move flags and eflags variables into cpu_struct. 2018-11-28 09:42:04 +00:00
SarahW
c1565eb42f Fix partial register handling - removes pointless loads when writing to non-32-bit registers (eg FPU or MMX). 2018-11-27 19:43:01 +00:00
SarahW
92ab0ee8ef Fix flags on 8-bit memory INC/DEC. 2018-11-27 10:15:18 +00:00
SarahW
e7d33dd76a Fixed Makefiles broken by rev 1197. 2018-11-27 09:39:06 +00:00
SarahW
c034381797 Added Trigem Korean VGA emulation. Patch from Greatpsycho. 2018-11-26 17:36:47 +00:00
SarahW
07035c97c8 Added recompiled versions of FABS, FCHS, FSQRT and FTST. 2018-11-26 17:00:00 +00:00
SarahW
856f0b4471 ARM64 MMX fixes 2018-11-25 17:59:38 +00:00
SarahW
6341caf318 ARM MMX fixes 2018-11-24 20:35:33 +00:00
SarahW
2a19183d83 Added debug code to log execution rate of non-recompiled instructions. 2018-11-24 20:16:52 +00:00
SarahW
086422b79f Added recompiled versions of PMULLW, PMULHW and PMADDWD. 2018-11-24 12:52:08 +00:00