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1,785 commits 3 branches 0 tags 5.5 MiB
Commit graph pcem/src/x86_ops_misc.h
Author SHA1 Message Date
SarahW
b973755ca3 Add hintable NOPs for Pentium Pro and II. 2020-11-14 19:33:03 +00:00
SarahW
7eff4f4ba8 Add SYSENTER and SYSEXIT instructions 2020-11-14 19:33:03 +00:00
SarahW
ce4436054d Replace cpu_has* flags with single cpu_features variable and cpu_has_feature() getter. 2019-02-08 21:22:53 +00:00
SarahW
c3250ca63e Don't set oldcpl at the start of each instruction; instead, only set it following a successful CS load. 2019-01-27 20:51:13 +00:00
SarahW
a4d3aa1912 Move flags and eflags variables into cpu_struct. 2018-11-28 09:42:04 +00:00
SarahW
91143d3c68 Move CPU segment structures into cpu_state structure. 2018-07-22 12:56:03 +01:00
SarahW
0f0a1c3223 Perform NULL segment checks upfront in opcode handlers, rather than on every memory access. 
This removes the need to pass the segment to readmem*l()/writemem*l().
 2018-07-18 22:10:18 +01:00
SarahW
8a1cef9851 Tweak DIV timing for Cyrix 486es. Improves Cyrix 486 CPU speed detection on SiS496/497. 2018-04-20 10:58:43 +01:00
SarahW
3d388564c1 Clear carry flag on DIV/IDIV on non-Cyrix processors. Fixes CPU type detection on Elonex PC-425X. 2018-04-19 22:00:09 +01:00
SarahW
bd06b5a1cc Add segment limit checking to opcode F6 (16-bit version) as temporary workaround for hang when opening Windows 9x DOS box on Diamond Stealth 32. 2018-04-11 17:37:41 +01:00
SarahW
5adac80648 Fixed a couple of uninitialised variables. 2017-12-16 21:13:17 +00:00
SarahW
717d815604 Tweak flat DS/SS dynarec optimisation, should reduce block churn when routines are called both with and without flat DS/SS. 
Fixed incorrect STACK32 flag when entering V86 mode that was hidden by block churn.
Protected and V86 mode status now considered when selecting block.
 2017-11-15 21:55:27 +00:00
SarahW
4c94ab07c9 286 LOADALL can not change PE bit in MSW register when in protected mode. Patch from Greatpsycho. 2017-06-20 19:32:12 +01:00
SarahW
083ca3d4a2 Slight optimisation when DS/SS are 'flat' (base=0, limit=4G). 2017-05-24 21:50:37 +01:00
SarahW
4cb5ddd7f7 Implemented undocumented F6/1 and F7/1 TEST instructions. 
Implemented undocumented F1 LOCK and ICEBP instructions.
Implemented missing 286 LOADALL functionality.
SMSW now sets all 12 bits to 1 on 286.
Patch from Greatpsycho.
 2017-04-28 18:47:38 +01:00
SarahW
2b892d2a7a Fixed compiler warnings for Windows builds. 
Added -Werror to Windows makefiles.
 2017-04-11 19:34:41 +01:00
SarahW
a4f3b2013e Added AMI 386DX and MR 386DX models (both based on OPTi 495 chipset). AMI 386DX supports external cache, useful for with prefetch emulation. 
Also commit a few fixes required :
- Set EDX correctly on soft reset
- LOCK NOP is now treated as an illegal instruction
- Tweaks to FDC sense interrupt handling following FDC reset
 2016-11-27 21:53:13 +00:00
SarahW
1b73963997 Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing. 2016-11-25 21:32:02 +00:00
SarahW
eb126fd822 Moved more variables into cpu_state structure. 2016-08-21 21:28:23 +01:00
SarahW
c664682758 Move some more variables into cpu_state structure. Minor speedup (~2%). 2016-08-17 21:28:16 +01:00
SarahW
535604b760 Pack decoded ModR/M data into a single word - minor recompiler speedup. 2016-08-14 16:29:54 +01:00
SarahW
c81a91fd72 Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%). 2016-04-20 21:39:41 +01:00
TomW
0b6be244ac Added 386 LOADALL instruction, removed 286 LOADALL from non-286 CPUs. Patch from Battler. 2016-02-07 18:15:43 +00:00
TomW
9715794e08 Recompiler now handles divide exceptions correctly - now runs Flight Simulator 5.1 with QEMM 2015-08-09 13:06:01 +01:00
TomW
d13caf1b8a HLT now reduces CPU usage in recompiler. 2014-11-16 15:09:27 +00:00
TomW
ac01998c1e LOCK prefix on recompiler no longer causes following instruction to be executed twice - fixes Windows 2000. 2014-11-16 15:01:31 +00:00
TomW
2905c43db8 Cycle counts for recompiled blocks now generated at compile time. 2014-11-12 19:33:49 +00:00
TomW
4676daade4 Initial commit of dynamic recompiler. 
Various CPU changes to support dynamic recompiler.
 2014-11-05 21:24:16 +00:00
TomW
008c795834 Further fixes to IMUL flags. 2014-10-02 19:52:56 +01:00
TomW
cd2c3b47ed Implemented selector limits on some instructions - fixes LBA2. 
GPFs in real mode now work.
Selectors correctly zeroed on far return to lower privilege.
 2014-08-13 20:33:56 +01:00
TomW
81e24b9cb5 Register operands on BOUND/LEA/LDS/LES/LFS/LGS/LSS now cause invalid opcode faults. Fixes NTVDM. 2014-04-27 11:40:03 +01:00
TomW
119fe36820 Added MMX emulation (probably some bugs). Implemented RDMSR/WRMSR for Winchip. 2013-08-03 15:05:50 +01:00
TomW
f822488656 Add missing files from last commit. 2013-05-27 19:56:33 +01:00