Commit graph pcem/src/x86_ops_mov_seg.h
Author SHA1 Message Date
SarahW
91143d3c68 Move CPU segment structures into cpu_state structure. 2018-07-22 12:56:03 +01:00
SarahW
0f0a1c3223 Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.
This removes the need to pass the segment to readmem*l()/writemem*l().
2018-07-18 22:10:18 +01:00
SarahW
1b73963997 Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing. 2016-11-25 21:32:02 +00:00
SarahW
eb126fd822 Moved more variables into cpu_state structure. 2016-08-21 21:28:23 +01:00
SarahW
c664682758 Move some more variables into cpu_state structure. Minor speedup (~2%). 2016-08-17 21:28:16 +01:00
SarahW
535604b760 Pack decoded ModR/M data into a single word - minor recompiler speedup. 2016-08-14 16:29:54 +01:00
SarahW
c81a91fd72 Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%). 2016-04-20 21:39:41 +01:00
TomW
a97e89e857 Added code generation for register and immediate PUSH/POP, RET, relative CALL and JMP instructions. 2015-03-30 20:42:33 +01:00
TomW
2905c43db8 Cycle counts for recompiled blocks now generated at compile time. 2014-11-12 19:33:49 +00:00
TomW
4676daade4 Initial commit of dynamic recompiler.
Various CPU changes to support dynamic recompiler.
2014-11-05 21:24:16 +00:00
TomW
5b35d58c27 Fixed default selector in instruction following MOV SS instruction, fixes Windows 3.1 installer 2014-08-16 17:36:50 +01:00
TomW
cd2c3b47ed Implemented selector limits on some instructions - fixes LBA2.
GPFs in real mode now work.
Selectors correctly zeroed on far return to lower privilege.
2014-08-13 20:33:56 +01:00
TomW
81e24b9cb5 Register operands on BOUND/LEA/LDS/LES/LFS/LGS/LSS now cause invalid opcode faults. Fixes NTVDM. 2014-04-27 11:40:03 +01:00
TomW
f822488656 Add missing files from last commit. 2013-05-27 19:56:33 +01:00