Commit graph pcem/src/codegen_ops_x86-64.h
Author SHA1 Message Date
SarahW
c3a127f01c Fixed alignment check in x86-64 recompiler. Fixes crash in Windows 95 setup. 2017-12-04 22:15:30 +00:00
SarahW
2f1514d3b2 Dynarec now jumps straight to GPF handler if it hits a NULL selector instead of relying on interpreter code to detect the GPF. Fixes hang in Windows 98 SE upgrade setup. 2017-11-27 21:09:42 +00:00
SarahW
717d815604 Tweak flat DS/SS dynarec optimisation, should reduce block churn when routines are called both with and without flat DS/SS.
Fixed incorrect STACK32 flag when entering V86 mode that was hidden by block churn.
Protected and V86 mode status now considered when selecting block.
2017-11-15 21:55:27 +00:00
SarahW
03a63ecb88 Fixed typo in x86-64 MEM_CHECK_WRITE_W()/L() functions - Windows XP boots on x86-64 recompiler again. 2017-06-13 20:34:45 +01:00
SarahW
3b4392bcf8 Implemented data misalignment penalties on 486 and later CPUs. 2017-06-04 16:41:33 +01:00
SarahW
fa9d9381b7 Clear flat DS/SS status on segment load during block. Fixes LBA 2. 2017-06-02 22:01:09 +01:00
SarahW
083ca3d4a2 Slight optimisation when DS/SS are 'flat' (base=0, limit=4G). 2017-05-24 21:50:37 +01:00
SarahW
2b892d2a7a Fixed compiler warnings for Windows builds.
Added -Werror to Windows makefiles.
2017-04-11 19:34:41 +01:00
SarahW
bb625f4fcf Fixed x86-64 recompiler versions of JBE/JNBE/JLE/JNLE. 2017-01-12 19:40:27 +00:00
SarahW
47ce7bda99 Fix x86-64 recompiler regression with use of 64-bit addresses 2017-01-10 11:06:51 +00:00
SarahW
3a72cc9593 Fixed issue with recompiled FCOMPP where the incorrect number of registers could be popped. 2016-12-10 18:44:45 +00:00
SarahW
d729fc8297 Added recompiled versions of MOV seg, POP seg, PUSH FS/GS, LDS,LES,LFS,LGS,LSS. 2016-12-10 12:23:06 +00:00
SarahW
6131d9b7d9 Fixed bug in x86-64 recompiler introduced by rev 581. 2016-12-10 11:50:41 +00:00
SarahW
437a9560f2 Added code generation for FCHS, FCOMPP, and FLD constant forms. 2016-12-07 20:52:02 +00:00
SarahW
747f8994ca Added code generation for RMW versions of SHL/SHR/SAR 2016-11-17 20:01:28 +00:00
SarahW
0985952317 Added code generation for RMW versions of ADD/SUB/OR/XOR/AND 2016-11-13 14:30:39 +00:00
SarahW
dd2a608707 x86-32 recompiler performs float->integer rounding by loading FPU control word instead of calling helper function - speedup on some stuff. 2016-09-18 14:57:10 +01:00
SarahW
6aef53e854 Remove remaining references to 32-bit addresses in x86-64 recompiler. 2016-08-28 15:58:30 +01:00
SarahW
5a02b518b8 Moved FPU register stack into cpu_state structure.
Fixed a couple of FPU bugs in x86-64 recompiler that were introduced in rev 543, fixes lightmap issues in Half-Life.
2016-08-25 21:09:02 +01:00
SarahW
eb126fd822 Moved more variables into cpu_state structure. 2016-08-21 21:28:23 +01:00
SarahW
c664682758 Move some more variables into cpu_state structure. Minor speedup (~2%). 2016-08-17 21:28:16 +01:00
SarahW
c81a91fd72 Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%). 2016-04-20 21:39:41 +01:00
TomW
4011a246ff Added code generation for MMX instructions 2016-02-24 20:55:48 +00:00
TomW
e9bea8ab7e Added recompiled versions of PUSH [mem], PUSH seg, NOP, CLD, STD, JMP indirect, CALL indirect. 2015-11-17 20:52:51 +00:00
TomW
a2046fe37f Fixed stupid typos in FPU rounding - Unreal software mode works again. 2015-10-19 20:34:58 +01:00
TomW
33685c3318 More changes to FPU nearest rounding, Unreal works again. 2015-09-28 20:33:36 +01:00
TomW
986476b9db FPU rounding modes now have effect in FADD double precision. Fixes rendering in Interstate '76. 2015-09-21 21:54:43 +01:00
TomW
f75a24f539 Rewrote recompiler implementation of NEG. 2015-08-08 16:05:05 +01:00
TomW
5f391a1992 Reduced number of unnecessary register loads in x86-64 recompiler. 2015-08-05 20:31:20 +01:00
TomW
0bf08d9e74 x86-64 recompiler now at parity with x86-32 2015-08-04 18:36:27 +01:00