SarahW
|
584e67845b
|
Added ROL, ROR and NOP uops to ARM and ARM64 backends.
|
2019-03-31 18:21:56 +01:00 |
|
SarahW
|
a73081f0bd
|
Fix ARM and ARM64 build errors.
|
2019-02-13 21:11:27 +00:00 |
|
SarahW
|
8998024225
|
Move GPF and early exit routines out of individual code blocks and into the common helper block.
|
2019-01-13 12:57:32 +00:00 |
|
SarahW
|
68464d6e81
|
Fix 3DNow build issues on ARM platforms.
|
2019-01-12 15:16:03 +00:00 |
|
SarahW
|
66fba50e06
|
Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7.
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
|
2019-01-12 15:15:43 +00:00 |
|
SarahW
|
e26abe7a1f
|
Added recompiled versions of 3DNow instructions - PF2ID, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQRT, PFRSQIT1, PFSUB, PFSUBR and PI2FD.
|
2018-12-14 21:59:03 +00:00 |
|
SarahW
|
07035c97c8
|
Added recompiled versions of FABS, FCHS, FSQRT and FTST.
|
2018-11-26 17:00:00 +00:00 |
|
SarahW
|
6341caf318
|
ARM MMX fixes
|
2018-11-24 20:35:33 +00:00 |
|
SarahW
|
086422b79f
|
Added recompiled versions of PMULLW, PMULHW and PMADDWD.
|
2018-11-24 12:52:08 +00:00 |
|
SarahW
|
77af266ab2
|
Added recompiled versions of PACK* and PUNPCK *
|
2018-11-23 18:34:30 +00:00 |
|
SarahW
|
a991bc3249
|
Added recompiled versions of PCMP*
|
2018-11-23 15:17:21 +00:00 |
|
SarahW
|
e43a2a6be0
|
Added recompiled versions of PSLL*, PSLR* and PSAR* with immediate shifts.
|
2018-11-22 18:43:36 +00:00 |
|
SarahW
|
35b9e0811b
|
Added recompiled versions of PADD* and PSUB*.
|
2018-11-22 15:57:44 +00:00 |
|
SarahW
|
78c604c731
|
Added recompiled versions of PAND, PANDN, POR and PXOR
|
2018-11-21 20:51:34 +00:00 |
|
SarahW
|
0055238ade
|
Added recompiled versions of FCOM, FCOMP, FCOMPP, FICOM, FICOM, FUCOM, FUCOMP and FUCOMPP.
|
2018-11-14 21:42:20 +00:00 |
|
SarahW
|
87191dde55
|
Added recompiled versions of FIST and FISTP.
|
2018-10-25 20:54:33 +01:00 |
|
SarahW
|
8a516df476
|
Added recompiled versions of FLD, FILD, FST and FSTP.
|
2018-10-17 19:47:04 +01:00 |
|
SarahW
|
78996b3e5c
|
Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
|
2018-10-07 22:02:31 +01:00 |
|
SarahW
|
1aadfd436d
|
Added recompiled versions of CBW, CDQ, CWD, CWDE and MOVSX.
|
2018-09-23 21:45:12 +01:00 |
|
SarahW
|
3332897886
|
Added recompiled versions of Jcc, JCXZ, LOOP, LOOPE and LOOPNE.
|
2018-08-30 22:26:33 +01:00 |
|
SarahW
|
872a2da788
|
Added recompiled versions of SHL, SHR, SAR, SHLD and SHRD.
|
2018-08-16 21:44:41 +01:00 |
|
SarahW
|
9bba93e0be
|
Added recompiled versions of LEA, MOV seg, MOVZX, NEG, NOP, NOT, PUSH imm, TEST and XCHG.
|
2018-08-08 22:14:22 +01:00 |
|
SarahW
|
57e5549f48
|
Remove final remnants of ARM literal pool, and expand work register set to 7 registers.
|
2018-08-05 16:24:48 +01:00 |
|
SarahW
|
f1df9be8f6
|
Added recompiled versions of JMP, CALL, RET, PUSH and POP.
|
2018-08-05 16:24:15 +01:00 |
|
SarahW
|
a9d46d95ec
|
Use MOVW/MOVT to load immediates on ARM instead of a literal pool.
|
2018-08-02 22:09:57 +01:00 |
|
SarahW
|
f27b7f757a
|
Add recompiled versions of mem->reg, reg->mem and imm->mem versions of MOV.
|
2018-07-25 20:16:58 +01:00 |
|