SarahW
91143d3c68
Move CPU segment structures into cpu_state structure.
2018-07-22 12:56:03 +01:00
SarahW
0f0a1c3223
Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.
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This removes the need to pass the segment to readmem*l()/writemem*l().
2018-07-18 22:10:18 +01:00
SarahW
1b73963997
Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing.
2016-11-25 21:32:02 +00:00
SarahW
eb126fd822
Moved more variables into cpu_state structure.
2016-08-21 21:28:23 +01:00
SarahW
c664682758
Move some more variables into cpu_state structure. Minor speedup (~2%).
2016-08-17 21:28:16 +01:00
SarahW
535604b760
Pack decoded ModR/M data into a single word - minor recompiler speedup.
2016-08-14 16:29:54 +01:00
SarahW
3597ae1873
If POP SS causes a fault then don't run the following instruction. Fixes Virtual Pool.
2016-05-05 19:24:18 +01:00
SarahW
c81a91fd72
Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%).
2016-04-20 21:39:41 +01:00
TomW
6d95f00c36
POP SS correctly disables interrupts on the next instruction.
2015-05-20 20:52:42 +01:00
TomW
2905c43db8
Cycle counts for recompiled blocks now generated at compile time.
2014-11-12 19:33:49 +00:00
TomW
4676daade4
Initial commit of dynamic recompiler.
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Various CPU changes to support dynamic recompiler.
2014-11-05 21:24:16 +00:00
TomW
cd2c3b47ed
Implemented selector limits on some instructions - fixes LBA2.
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GPFs in real mode now work.
Selectors correctly zeroed on far return to lower privilege.
2014-08-13 20:33:56 +01:00
TomW
f478ed3b96
Fixed use of selector override with POP r/m - GTA now works again.
2013-10-31 19:57:25 +00:00
TomW
f195495f3a
Initial SiS496/497 emulation.
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Fixed ESP value on ENTER when page fault after first push.
Fixed execution time of IDE Set Idle command.
Fixed head number on FDC Read Sector ID command.
2013-07-15 18:23:26 +01:00
TomW
f822488656
Add missing files from last commit.
2013-05-27 19:56:33 +01:00
