Commit graph pcjs/modules
Author SHA1 Message Date
Jeff
f1c0dce8ab Cleaned up checkStackLimit() processing, fixing some problems along the way (most notably, mode 6 references were not being checked) 2016-11-18 20:27:42 -08:00
Jeff
c42ecd63a5 Some more information on the 11/70 CPU instruction exerciser 2016-11-18 16:50:05 -08:00
Jeff
7ac9bfe282 Fixed spurious faults in RL11 2016-11-18 13:51:53 -08:00
Jeff
4f912a56c5 The PDP-11 EKBEE1 diagnostic finally passes (on a 256Kb PDP-11/70 configuration at least) 2016-11-18 10:43:10 -08:00
Jeff
60970617ce Another PDP-11 EKBEE1 diagnostic failure bites the dust 2016-11-18 09:38:50 -08:00
Jeff
7088a185fd Fixed a few more MMU bugs uncovered by the EKBEE1 diagnostics; the end is in sight 2016-11-17 23:51:30 -08:00
Jeff
861d78e6d2 Added support for address-specific message categories in I/O tables 2016-11-17 17:47:57 -08:00
Jeff
a3833fba28 PDP-11 debugger "p" command works now 2016-11-17 17:14:01 -08:00
Jeff
05c2f0ebfe Fixed a double-trap MMU bug (both src and dst operands triggered a trap, but since the latter was an abort, the former needed to be ignored) 2016-11-17 16:21:13 -08:00
Jeff
9148cec085 Added MMU dump command ("d mmu [filter]"), fixed byte updates of PDRs, masked 18-bit UNIBUS addresses when UNIBUS relocation map not enabled, and fixed reads of MMR0 when ABORT bits are set 2016-11-17 13:22:25 -08:00
Jeff
2b23c86649 Debugger improvements (dumping/setting MMU registers) 2016-11-16 17:44:52 -08:00
Jeff
00d6fb6c59 Allow pasted text in the virtual SerialPort window to be processed as received data, and tidy up the MMR0 updates 2016-11-16 13:54:10 -08:00
Jeff
9d67f243ef Fixed MMR1/MMR2 updates, and synced boot monitor code with http://skn.noip.me/pdp11/boot.mac 2016-11-15 16:16:38 -08:00
Jeff
7342ea254e Apparently, 248Kb 11/70 configurations are not normal (diagnostic EKBEE1 complains), so all those machine configs have been bumped to 256Kb 2016-11-15 10:38:43 -08:00
Jeff
5bc0c8cca9 Simplified the I/O registration function, added support for Panel debugger messages, and added some new Panel behavior on the RESET instruction 2016-11-15 10:05:25 -08:00
Jeff
365b24c684 Fixed the SXT and XOR opcodes (a couple of small oops) 2016-11-14 21:03:04 -08:00
Jeff
77897275eb Limit CPU display updates to a reasonable number (ie, twice per second) 2016-11-14 20:10:18 -08:00
Jeff
297be4e92d Used finish instead of done for "finishing" methods 2016-11-14 16:48:49 -08:00
Jeff
0370b81a69 Leave the DATA display register alone on the 11/70 (making it more diagnostic-friendly) 2016-11-14 15:27:55 -08:00
Jeff
ba0ca49854 Updated start address for the DEQKC 11/70 test 2016-11-14 10:44:24 -08:00
Jeff
0607d65b70 Fixed RTI on older PDP-11s (ie, 11/20); the old RTI behaves like the new RTT, which did not exist on older machines 2016-11-13 21:17:46 -08:00
Jeff
d533ae69aa Fixed a hardware interrupt signalling check in MAINDEC Test #15 2016-11-13 19:08:00 -08:00
Jeff
d0911c49e2 Mask bit 7 on all SerialPort bytes sent to PDPjs internal display buffers 2016-11-13 18:31:06 -08:00
Jeff
9bc4f81eda Added more PDP-11 diagnostic tapes 2016-11-13 17:44:28 -08:00
Jeff
d94ae4c655 Sync with gh-pages branch 2016-11-13 16:14:22 -08:00
Jeff
85163fe823 Updated comments in readSrcWord() 2016-11-13 11:50:07 -08:00
Jeff
17816f6fcc Fixed bug in writeDstWord() that was updating flags with negative data (and sadly, none of DEC's basic tests caught it) 2016-11-13 11:34:59 -08:00
Jeff
91bd3c1a7a Reinitialize the DL11 receive buffer on reset 2016-11-12 12:59:17 -08:00
Jeff
2c1191ce6e DEC's "TRAP TEST" finally passes (and I learned a lot about PDP-11 opcode idiosyncrasies in the process) 2016-11-12 12:54:13 -08:00
Jeff
b4cb9651ce Removed redundant CSS 2016-11-11 15:50:32 -08:00
Jeff
b87c77b0a0 Factored trap checks into separate function: checkTraps() 2016-11-11 15:49:37 -08:00
Jeff
bdb06e458f Fixed TRAP TEST diagnostic that expected a stack overflow trap to be acknowledged immediately after a hardware interrupt was dispatched 2016-11-11 14:56:01 -08:00
Jeff
03e4169df2 Changed how DL11 transmitter interrupts are triggered on writes to the XCSR (to satisfy the TRAPS TEST) 2016-11-10 22:06:06 -08:00
Jeff
db63c30c1e Made some progress with DEC's "TRAP TEST", but looks like it still needs some work 2016-11-10 15:51:47 -08:00
Jeff
eb6bf8a5a5 Fixed ASRB and RORB instructions, added a new dump command ("ds"), and fixed timer function initialization 2016-11-10 06:10:54 -08:00
Jeff
9fe3ba6e09 Added some early PDP-11 diagnostic tapes 2016-11-09 20:25:38 -08:00
Jeff
595c40e446 Cleaned up the Front Panel address and data interfaces so that BOOTMON's "LIGHTS" test works as expected now 2016-11-09 12:46:03 -08:00
Jeff
f43d1c1745 Revert back to propagating R0 to the Front Panel data path on a WAIT instruction (per PDP-11 lore) 2016-11-08 14:21:07 -08:00
Jeff
010ba29b20 Fixed the LKS Monitor bit 2016-11-08 09:24:01 -08:00
Jeff
a88e2d7b39 Fixed the frequency of PDP-11 display updates 2016-11-07 18:30:33 -08:00
Jeff
eb3b38a5ad Fixed XXDP disk boot (haven't tried any tests yet, but it's still good progress) 2016-11-07 17:20:53 -08:00
Jeff
8188554875 Fixed the fallback logic for IOPAGE ranges where only byte handlers exist (ie, the readROMByte() case) 2016-11-06 09:48:12 -08:00
Jeff
9e00cd4dad Attempted to make switches more "touch-friendly" 2016-11-05 15:12:52 -07:00
Jeff
71546f1ed5 Fixed incorrect RL11 addresses 2016-11-05 12:45:54 -07:00
Jeff
c67176eab0 Added the ability to install external ROMs (eg, M9312 ROM images) into the IOPAGE 2016-11-05 12:01:56 -07:00
Jeff
0cf11c0b01 Fixed the memory clear "toggle-in", by returning the correct amount of installed RAM, and passing properly masked addresses to all the I/O handlers 2016-11-04 17:09:50 -07:00
Jeff
a7a44a8288 Cleaned up the PDP-11 updateDisplay(s) code, and removed the update hack inside the WAIT instruction; display updates now occur in sync with the machine's 60Hz clock 2016-11-04 13:35:20 -07:00
Jeff
0d11d279bb Changed SDR and SAR register references to PDR and PAR, which seems in keeping with more of DEC's own literature 2016-11-03 17:19:15 -07:00
Jeff
3b88e4c53c Memory can now be explicitly "zeroed" with any byte pattern (but the default is still zero); note that memory blocks are still always zero-initialized when first created 2016-11-03 15:50:19 -07:00
Jeff
97de321daa Fixed zeroMemory() to properly zero any block(s) that originally underlaid the IOPAGE block(s), rather than trying to zero the IOPAGE block itself (which would be a bad idea) 2016-11-03 15:36:37 -07:00