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Leave the DATA display register alone on the 11/70 (making it more diagnostic-friendly)

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This commit is contained in:
Jeff 2016-11-14 15:27:55 -08:00 • committed by Jeff Parsons
commit 0370b81a69
16 changed files with 198 additions and 172 deletions
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32
modules/pdp11/lib/cpuops.js
View file

@ -1122,7 +1122,34 @@ PDP11.opHALT = function(opCode)
this.trap(PDP11.TRAP.BUS, 0, PDP11.REASON.HALT);
} else {
if (this.panel) {
this.panel.setData(this.regsGen[0], true);
/*
* The PDP-11/20 Handbook (1971) says that HALT does the following:
*
* Causes the processor operation to cease. The console is given control of the bus.
* The console data lights display the contents of RO; the console address lights display
* the address after the halt instruction. Transfers on the UNIBUS are terminated immediately.
* The PC points to the next instruction to be executed. Pressing the continue key on the
* console causes processor operation to resume. No INIT signal is given.
*
* However, the PDP-11/70 Handbook (1979) suggests some slight differences:
*
* Causes the processor operation to cease. The console is given control of the processor.
* The data lights display the contents of the PC (which is the address of the HALT instruction
* plus 2). Transfers on the UNIBUS are terminated immediately. Pressing the continue key on
* the console causes processor operation to resume.
*
* Given that the 11/70 doesn't saying anything about displaying R0 on a HALT, and also given that
* the 11/70 CPU EXERCISER diagnostic writes a value to the Console Switch/Display Register immediately
* before HALT'ing, I'm going to assume that updating the data display with R0 is unique to the 11/20.
*
* Also, I'm a little suspicious of the 11/70 comment that the "data lights display the contents of
* the PC," since previous models display the PC on the ADDRESS lights, not the DATA lights. And as
* I already explained, doing anything to the data lights at this point would undo what the 11/70
* diagnostics do.
*/
if (this.model == PDP11.MODEL_1120) {
this.panel.setData(this.regsGen[0], true);
}
}
if (!this.dbg) {
/*
@ -1443,8 +1470,7 @@ PDP11.opNOP = function(opCode)
PDP11.opRESET = function(opCode)
{
if (!(this.regPSW & PDP11.PSW.CMODE)) {
this.bus.reset();
this.resetRegs();
this.resetCPU();
}
this.nStepCycles -= 667; // TODO: Review (but it's definitely a big number)
};

15
modules/pdp11/lib/cpustate.js
View file

@ -225,6 +225,17 @@ CPUStatePDP11.prototype.initRegs = function()
this.resetRegs();
};
/**
* resetCPU()
*
* @this {CPUStatePDP11}
*/
CPUStatePDP11.prototype.resetCPU = function()
{
this.bus.reset();
this.resetRegs();
};
/**
* resetRegs()
*
@ -395,9 +406,7 @@ CPUStatePDP11.prototype.setReset = function(addr, fReset)
{
this.addrReset = addr;
/*
* If we're going to slam this new address straight into PC, then it seems wise to reset the PSW as well.
*/
this.resetCPU();
this.setPC(addr);
this.setPSW(0);

2
modules/pdp11/lib/defines.js
View file

@ -459,7 +459,7 @@ var PDP11 = {
XCSR: 0o177564, // Display Terminal: Transmitter Status Register
XBUF: 0o177566, // Display Terminal: Transmitter Data Buffer Register
CNSW: 0o177570, // Console (Front Panel) Switch Register
CNSW: 0o177570, // Console (Front Panel) Switch/Display Register
MMR0: 0o177572, // 777572 17777572
MMR1: 0o177574, // 777574 17777574