46 lines
1.3 KiB
Markdown
46 lines
1.3 KiB
Markdown
Debugging Notes
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===
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Checkpoint
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---
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This code:
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F000:F9E9 B000 MOV AL,00
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F000:F9EB E620 OUT 20,AL
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triggers the following warning:
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notice: PIC0(0x20): unsupported OCW2 automatic EOI command: 0x00
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and the very next instruction:
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F000:F9ED E6A0 OUT A0,AL
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triggers the same warning:
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notice: PIC1(0xA0): unsupported OCW2 automatic EOI command: 0x00
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Checkpoint
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---
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There's a loop at F000:B5AA that stores 0x4000 DWORDs into RAM (ie, 64Kb), where each DWORD is
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a single-bit left rotation of the preceding DWORD. This is followed by another loop that loads
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each DWORD and verifies that it contains the appropriate bit.
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Then a stack is set up in RAM (at 0030:0100) and the first CALL is issued:
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F000:BC2E E87DEC CALL A8AE
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There's some CMOS I/O activity, serial and parallel port I/O, more CMOS I/O, and then some EGA I/O.
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When arrive here:
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C000:016D B80700 MOV AX,0007
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C000:0170 CD10 INT 10
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and we complain that the IDTR limit for the real-mode IDT isn't 0x3FF (it's been set to 0xFFFF instead).
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That may be OK, but I need to verify that that's what the ROM intended. If it is, then I'll probably need
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to change our assertion from "cpu.addrIDTLimit == 0x03FF" to "cpu.addrIDTLimit >= 0x03FF".
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Checkpoint
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---
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The BIOS now progresses as far as F000:F747 (PUSH GS).
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