SarahW
2007c25177
Start reducing size of codeblock_t structure.
...
Re-arrange all variables needed to run a block to fit in a single cache line.
2018-11-28 20:29:48 +00:00
SarahW
d63176e472
Move dynarec code memory out of codeblock structure.
2018-11-28 18:43:40 +00:00
SarahW
356f406b22
Fix codegen pointer register reads.
2018-11-28 18:41:53 +00:00
SarahW
335cea3ee1
Added recompiled versions of PUSHF and PUSHFD.
2018-11-28 15:19:21 +00:00
SarahW
5df3f6caef
Added recompiled versions of PUSHA and POPA.
2018-11-28 11:50:24 +00:00
SarahW
e012420f90
Added recompiled versions of CLC, CLD, CLI, CMC, STC, STD and STI.
2018-11-28 09:58:50 +00:00
SarahW
a4d3aa1912
Move flags and eflags variables into cpu_struct.
2018-11-28 09:42:04 +00:00
SarahW
c1565eb42f
Fix partial register handling - removes pointless loads when writing to non-32-bit registers (eg FPU or MMX).
2018-11-27 19:43:01 +00:00
SarahW
92ab0ee8ef
Fix flags on 8-bit memory INC/DEC.
2018-11-27 10:15:18 +00:00
SarahW
e7d33dd76a
Fixed Makefiles broken by rev 1197.
2018-11-27 09:39:06 +00:00
SarahW
c034381797
Added Trigem Korean VGA emulation. Patch from Greatpsycho.
2018-11-26 17:36:47 +00:00
SarahW
07035c97c8
Added recompiled versions of FABS, FCHS, FSQRT and FTST.
2018-11-26 17:00:00 +00:00
SarahW
856f0b4471
ARM64 MMX fixes
2018-11-25 17:59:38 +00:00
SarahW
6341caf318
ARM MMX fixes
2018-11-24 20:35:33 +00:00
SarahW
2a19183d83
Added debug code to log execution rate of non-recompiled instructions.
2018-11-24 20:16:52 +00:00
SarahW
086422b79f
Added recompiled versions of PMULLW, PMULHW and PMADDWD.
2018-11-24 12:52:08 +00:00
SarahW
77af266ab2
Added recompiled versions of PACK* and PUNPCK *
2018-11-23 18:34:30 +00:00
SarahW
a991bc3249
Added recompiled versions of PCMP*
2018-11-23 15:17:21 +00:00
SarahW
e43a2a6be0
Added recompiled versions of PSLL*, PSLR* and PSAR* with immediate shifts.
2018-11-22 18:43:36 +00:00
SarahW
35b9e0811b
Added recompiled versions of PADD* and PSUB*.
2018-11-22 15:57:44 +00:00
SarahW
78c604c731
Added recompiled versions of PAND, PANDN, POR and PXOR
2018-11-21 20:51:34 +00:00
SarahW
76115568f2
Added recompiled versions of MOVD and MOVQ.
2018-11-21 17:02:20 +00:00
SarahW
f545d9d57f
Rename FPU stack-based integer mirror registers, to avoid confusion with non-stack-based MMX registers.
2018-11-21 12:44:47 +00:00
SarahW
59d5ce4a50
Reduce keyboard scancode and state arrays from int to uint8_t. Patch from Tale.
2018-11-20 10:50:21 +00:00
SarahW
e0fd70b4a2
Correct keyboard scancode set used for key repeat. Patch from Tale.
2018-11-20 10:44:38 +00:00
SarahW
e557bda696
Fixed DIP switch value for AMA932J's built-in OTI067. Fixes colour/black and white switch. Patch from Greatpsycho.
2018-11-20 10:40:38 +00:00
SarahW
fa4ccece48
Fixed pixel clock on S3 ViRGE.
2018-11-20 09:40:54 +00:00
SarahW
964b20e820
Added recompiled versions of FLD1 and FLDZ.
2018-11-14 21:43:22 +00:00
SarahW
0055238ade
Added recompiled versions of FCOM, FCOMP, FCOMPP, FICOM, FICOM, FUCOM, FUCOMP and FUCOMPP.
2018-11-14 21:42:20 +00:00
SarahW
4155b283ab
Added Sigma Designs Color 400 emulation. Patch from John Elliott.
2018-11-13 18:53:55 +00:00
SarahW
5167ba5b2d
Added Tulip AT Compact. Patch from dns2kv2.
2018-11-12 21:05:40 +00:00
SarahW
461cb221ca
Implemented experimental Headland HT102 chipset based EMS support.
...
Added Trigem 266M and AMA-932J machines.
Patch from Greatpsycho.
2018-11-12 20:32:53 +00:00
SarahW
8dc7b2ef36
SCAT chipset improvements :
...
- Implemented ROMCS enable feature.
- Fixed RAM write protect register setting wasn't properly applied.
- Implemented Encoded RAS mode emulation on 82C235 revision A and 82C386 chipset.
- Implemented of experimental memory bank interleaved addressing emulation on
82C836 chipset and removed hardcoded memory configuration setting. KMX-C-02's
BIOS now automatically detects DRAM configuration and set DRAM configuration
register value correctly.
- Improved accuracy of 82C235 chipset's memory bank addressing. GW-286CT GEAR
BIOS now set DRAM configuration register correctly when Dynamic Memory Resizing
is enabled.
- Changed Award286 clone and Samsung SPC-4200P's chipset revision to rev A.
- SCAT revision D chipset now set high ROM mapping size to 128KB.
Patch from Greatpsycho
2018-11-12 20:16:32 +00:00
SarahW
b814bcc80d
Added recompiled versions of FSTCW and FSTSW.
2018-10-25 21:43:32 +01:00
SarahW
87191dde55
Added recompiled versions of FIST and FISTP.
2018-10-25 20:54:33 +01:00
SarahW
589f50e479
Added recompiled version of FILDq.
2018-10-22 21:23:09 +01:00
SarahW
bce9ad4f3d
Added recompiled versions of FFREE, FLD, FST, FSTP and FXCH.
2018-10-21 16:22:20 +01:00
SarahW
6d8af5df4a
Added recompiled versions of memory variants of F[I]ADD, F[I]DIV, F[I]DIVR, F[I]MUL, F[I]SUB and F[I]SUBR.
2018-10-20 20:03:28 +01:00
SarahW
8a516df476
Added recompiled versions of FLD, FILD, FST and FSTP.
2018-10-17 19:47:04 +01:00
SarahW
e17a94a409
FDIVP/FDIVRP should pop the stack when a divide by zero occurs and the exception is masked. Fixes software rendering on Need for Speed III.
2018-10-09 22:10:29 +01:00
SarahW
829c74f2d5
Don't write back unchanged registers on flush + invalidate.
2018-10-09 14:07:49 +01:00
SarahW
d9e38fe37c
Fix masking of FPU top-of-stack in several places. Fixes DOS Quake.
2018-10-09 13:51:05 +01:00
SarahW
305b6cc4fd
Added recompiled register versions of FADDP, FDIVP, FDIVRP, FMULP, FSUBP and FSUBRP.
2018-10-08 21:44:30 +01:00
SarahW
78996b3e5c
Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
2018-10-07 22:02:31 +01:00
SarahW
dbb01ef9e2
Cleaned up x87 tag register handling.
2018-10-01 21:02:40 +01:00
SarahW
e9ff110021
Fixed flags on register->register ADD/SUB opcode 00/01/28/29. Fixes rendering in Need For Speed II.
2018-09-30 17:30:28 +01:00
SarahW
94fe85b17e
Fixed video clock on Cirrus Logic cards.
2018-09-29 17:43:02 +01:00
SarahW
592b07be63
Added recompiled versions of JMP indirect, JMP far, RETF, LxS, XLAT and LEAVE.
2018-09-29 17:42:44 +01:00
SarahW
1aadfd436d
Added recompiled versions of CBW, CDQ, CWD, CWDE and MOVSX.
2018-09-23 21:45:12 +01:00
SarahW
8a19e56340
Added recompiled versions of INC and DEC.
2018-09-12 20:16:27 +01:00