Commit graph pcem/src/codegen_ops_x86.h
Author SHA1 Message Date
SarahW
c81a91fd72 Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%). 2016-04-20 21:39:41 +01:00
TomW
4011a246ff Added code generation for MMX instructions 2016-02-24 20:55:48 +00:00
TomW
e9bea8ab7e Added recompiled versions of PUSH [mem], PUSH seg, NOP, CLD, STD, JMP indirect, CALL indirect. 2015-11-17 20:52:51 +00:00
TomW
a2046fe37f Fixed stupid typos in FPU rounding - Unreal software mode works again. 2015-10-19 20:34:58 +01:00
TomW
33685c3318 More changes to FPU nearest rounding, Unreal works again. 2015-09-28 20:33:36 +01:00
TomW
299f6c8dfb Nearest FPU rounding mode now handles negative numbers correctly. Fixes Retro City Rampage 486. 2015-09-26 17:54:25 +01:00
TomW
986476b9db FPU rounding modes now have effect in FADD double precision. Fixes rendering in Interstate '76. 2015-09-21 21:54:43 +01:00
TomW
a2bef57491 Minor optimisation to x86 recompiler versions of JL/JNL/JLE/JNLE/JBE/JNBE. 2015-08-19 21:31:13 +01:00
TomW
f75a24f539 Rewrote recompiler implementation of NEG. 2015-08-08 16:05:05 +01:00
TomW
0bf08d9e74 x86-64 recompiler now at parity with x86-32 2015-08-04 18:36:27 +01:00
TomW
c84cf05dc2 Minor optimisations to recompiler memory functions. 2015-07-10 20:58:41 +01:00
TomW
51489d031c Reduced number of segment/selector checks in recompiler - minor speedup. 2015-07-08 20:40:37 +01:00
TomW
f3607c2308 Added code generation for :
- FCOM/FUCOM
- FSUBR/FSUBRP/FDIVR/FDIVRP
- FLDCW/FSTCW
- FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants)
- FLD/FST/FSTP double precision
- Integer and double precision variants of FADD/FSUB/FMUL/FDIV
Also added 64-bit readmemq/writememq functions.
2015-06-13 16:14:35 +01:00
TomW
9061c5d2fc Added code generation for :
- TEST immediate
- register versions of NOT and NEG
- fixed shift versions of SHL, SHR and SAR
- MOVZX and MOVSX
- LEA
- CMP with memory destination
- JL, JNL, JLE, JNLE, JBE, JNBE
2015-05-30 17:08:54 +01:00
TomW
52a27a9256 FPU copy should now work. 2015-05-18 20:33:33 +01:00
TomW
8f1f7e01c0 Fixed stupid bug in FPU rounding mode in recompiler, fixed particle explosions in Quake. 2015-04-22 19:26:52 +01:00
TomW
50b74dcb2a Illegal instruction interrupt caused by disabled FPU has correct return address - Turok works again. 2015-04-21 17:39:04 +01:00
TomW
15bca849c8 Added code generation for first batch of FPU instructions; instructions added are most common instructions used in Quake. 2015-04-19 08:42:04 +01:00
TomW
bbf0011e95 Added code generation for JCXZ, LOOP, JE, JNE, JS, JNS, JB, JNB, JO, JNO, JP and JNP. 2015-04-14 20:40:40 +01:00
TomW
6caeca2c7c Tweaks to generated code, should reduce size slightly. 2015-04-11 16:06:50 +01:00
TomW
a97e89e857 Added code generation for register and immediate PUSH/POP, RET, relative CALL and JMP instructions. 2015-03-30 20:42:33 +01:00
TomW
ba715706b6 Added code generation for memory versions of MOV, and memory source versions of ADD, SUB, AND, OR, XOR and CMP. 2015-02-08 17:17:14 +00:00
TomW
ea5e96569d Lazy flags code now handles carry flag. 2015-02-02 19:54:01 +00:00
TomW
630592125c Added code generation for immediate->register and register versions of MOV, XCHG, ADD, SUB, AND, OR, XOR, TEST, CMP, INC and DEC. 2015-01-16 21:22:14 +00:00