SarahW
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5e35e48ec7
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XMM registers are not preserved across function calls, and should be flushed & discarded by the recompiler prior to calling external functions. Fixes graphics issues in some games (eg World Cup 98 title/menus).
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2019-05-05 14:49:10 +01:00 |
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SarahW
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a73081f0bd
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Fix ARM and ARM64 build errors.
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2019-02-13 21:11:27 +00:00 |
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SarahW
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8998024225
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Move GPF and early exit routines out of individual code blocks and into the common helper block.
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2019-01-13 12:57:32 +00:00 |
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SarahW
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66fba50e06
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Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7.
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
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2019-01-12 15:15:43 +00:00 |
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SarahW
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9ff1c7f409
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Further reductions to codeblock_t size - replace link pointers with uint16_t block indicies, shrink ins to uint8_t, remove endpc. codeblock_t now fits in a 64-byte cacheline on 32-bit platforms.
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2018-11-29 20:05:12 +00:00 |
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SarahW
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d63176e472
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Move dynarec code memory out of codeblock structure.
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2018-11-28 18:43:40 +00:00 |
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SarahW
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87191dde55
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Added recompiled versions of FIST and FISTP.
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2018-10-25 20:54:33 +01:00 |
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SarahW
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589f50e479
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Added recompiled version of FILDq.
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2018-10-22 21:23:09 +01:00 |
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SarahW
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8a516df476
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Added recompiled versions of FLD, FILD, FST and FSTP.
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2018-10-17 19:47:04 +01:00 |
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SarahW
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78996b3e5c
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Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
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2018-10-07 22:02:31 +01:00 |
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SarahW
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57e5549f48
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Remove final remnants of ARM literal pool, and expand work register set to 7 registers.
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2018-08-05 16:24:48 +01:00 |
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SarahW
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42d62925c3
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Fix compiler warnings on ARM builds.
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2018-08-02 22:09:18 +01:00 |
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SarahW
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e64271f5bb
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Added recompiled versions of mem->reg, reg->mem and imm->mem versions of ADD, AND, CMP, OR, SUB and XOR.
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2018-07-27 22:24:34 +01:00 |
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SarahW
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f27b7f757a
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Add recompiled versions of mem->reg, reg->mem and imm->mem versions of MOV.
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2018-07-25 20:16:58 +01:00 |
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SarahW
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94fea237b4
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Implemented effective address compilation.
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2018-06-28 22:06:42 +01:00 |
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SarahW
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ee3f9210dc
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Implemented basic register allocation.
Mainly handles 'virtual' registers at the moment (eg current and last PC values, segment override status, etc).
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2018-06-23 19:04:36 +01:00 |
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SarahW
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03fe25d818
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First stage of dynamic recompiler rewrite.
Basic IR generation calls C implementation of all instructions.
Backend generation implemented for x86, x86-64, ARM and ARM64.
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2018-06-17 20:26:15 +01:00 |
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