TomW
262b188790
Implemented CR4 register for Winchip. Currently only Time Stamp Disable (TSD) has an effect.
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Fixed stupid bug in WRMSR - MSRs can now be written with values other than zero.
2014-08-23 16:28:16 +01:00
TomW
cd2c3b47ed
Implemented selector limits on some instructions - fixes LBA2.
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GPFs in real mode now work.
Selectors correctly zeroed on far return to lower privilege.
2014-08-13 20:33:56 +01:00
TomW
b0320ae16c
Moved PIT to common timer API.
2014-06-19 21:02:59 +01:00
TomW
9ba75bd910
Minor memory optimisations.
2014-06-07 15:57:57 +01:00
TomW
e737d2fa45
Loading a segment register in real mode no longer clears USE32.
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CR3 no longer masks values written to it.
Real mode interrupts now take IDT base into account.
Fixes 'huge unreal' mode (flat assembler).
2014-03-29 14:28:13 +00:00
TomW
2ca4ead570
Implemented preliminary S3 ViRGE 2D blitter emulation.
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Misc ViRGE fixes.
Changes to memory mapping.
Changes to PCI handling.
Disabled 'AMI WinBIOS 486 PCI' due to incomplete chipset emulation.
Invalid GUS register reads no longer kill the emulator.
2014-03-20 14:03:55 +00:00
TomW
f18f10574a
Preliminary PCjr emulation.
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Improvements to PIT and serial emulation.
2014-01-12 11:37:09 +00:00
TomW
3116b7078b
Disable memory dumps on release builds
2013-12-21 20:22:50 +00:00
TomW
36cdd540b2
PIT timers can now be restarted using GATE input - CPU speed detection on SiS496/497 now works.
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Added missing port 0x61 to Olivetti M24 - PC speaker now works on that machine.
Some code tidying.
2013-11-08 22:32:34 +00:00
TomW
7735e82085
Altered device memory mapping.
2013-10-19 17:06:55 +01:00
TomW
f431e74917
Video optimisations. Fixed VRAM mask on S3.
2013-07-09 19:30:53 +01:00
TomW
58085bcc87
Re-organisation of video emulation.
2013-06-24 20:42:35 +01:00
TomW
f822488656
Add missing files from last commit.
2013-05-27 19:56:33 +01:00
