37 lines
1.9 KiB
Markdown
37 lines
1.9 KiB
Markdown
---
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layout: page
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title: DEC VT100 ROMs
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permalink: /devices/pc8080/rom/vt100/
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---
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DEC VT100 ROMs
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The DEC VT100 Terminal used four 2Kb ROMs to store the code used by its 8080 processor.
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Their combined contents are stored in [VT100.json](VT100.json).
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As Trammell Hudson's [VT100 Page](https://trmm.net/VT100) explains:
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There are four 8316E ROM chips for the 8080 CPU on the logic board. Since they are custom mask ROMs,
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Digital was able to have a different chip-select bit pattern and avoided having separate NOT gates on the inputs.
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Note that the schematic appears to be incorrect -- E56 is the low order, and E40 is the high order address bits.
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He then describes the memory mapping as follows:
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ROM chip CS1 (20) A11/CS2 (18) A12/CS3 (21) Mapped address
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E40 H H H 0x1800
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E45 H L H 0x1000
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E52 H H L 0x0800
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E56 H L L 0x0000
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The above PCB chip locations correspond to the following [DEC ROM](/devices/roms/dec/) dumps:
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* E56: [23-061E2.bin](https://web.archive.org/web/20140723115846/http://www.dunnington.u-net.com/public/DECROMs/23-061E2.bin)
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* E52: [23-032E2.bin](https://web.archive.org/web/20140723115846/http://www.dunnington.u-net.com/public/DECROMs/23-032E2.bin)
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* E45: [23-033E2.bin](https://web.archive.org/web/20140723115846/http://www.dunnington.u-net.com/public/DECROMs/23-033E2.bin)
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* E40: [23-034E2.bin](https://web.archive.org/web/20140723115846/http://www.dunnington.u-net.com/public/DECROMs/23-034E2.bin)
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And sure enough, concatenating those four DEC ROM dumps produces a perfect match for Trammell Hudson's
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[VT100.bin](http://trmm.net/images/2/20/VT100.bin).
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The VT100 also used one 2Kb character generator ROM, which is stored in [23-018E2.json](23-018E2.json).
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