64 lines
3 KiB
Markdown
64 lines
3 KiB
Markdown
---
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layout: page
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title: "x86 Instructions: AAM"
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permalink: /docs/x86/ops/AAM/
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---
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AAM (0xD4)
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---
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### Description
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Excerpt from [http://www.rcollins.org/secrets/opcodes/AAM.html](http://www.rcollins.org/secrets/opcodes/AAM.html):
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Undocumented: Available to all Intel x86 processors.
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Useful in production source code.
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AAM
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Flags: ASCII Adjust after Multiply
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|O|D|I|T|S|Z|A|P|C| | 11010100 | DATA |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|0| | | |+|+|0|+|0| | D4 | IMM8 |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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AAM is shown as a two byte encoding used to divide AL by 10, putting
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the quotient in AH, and the remainder in AL. However, AAM is listed in
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the op code map as a single byte instruction. This leads one to wonder
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why a two-byte opcode is listed in the single-byte opcode map.
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In reality, the second byte is an undocumented operand to AAM. The operand
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is the divisor. In its documented incarnation, AAM is encoded as D4 0A.
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The operand 0A is the divisor. This divisor can be changed to any value
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between 0 and FF. Using AAM in this manner is useful -- as it extends the
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CPU instruction set to include a DIV IMM8 instruction that is not available
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from any other form of the DIV instruction.
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The extended form of the AAM instruction is also useful because it sets the
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flags register according to the results, unlike the DIV or IDIV instruction.
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According to Intel documentation, SF, ZF, and PF flags are set according
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to the result, while OF, AF, and CF are undefined. However, if AAM were used
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strictly as documented, then the Sign Flag (SF) could not be set under any
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circumstances, since anything divided by 10 will leave a remainder between
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0 and 9. Obviously the remainder could never be between 128 and 255 (or -1
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and -128 if you prefer) if used only as documented. Since AAM divides an
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8-bit number by another 8-bit number, a carry or overflow could never occur.
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Therefore CF and OF always=0. Intel claims they are undefined, but my
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observations are consistent with my theory.
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Contrary to documentation, AAM will generate exceptions in real mode,
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protected mode, and V86 mode. AAM can only generate Exception 0 -- divide
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by 0.
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Finally, in the Pentium User's Manual, this heretofore undocumented form of
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AMM is described. Intel says:
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Note: imm8 has the value of the instruction's second byte. The
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second byte under normally assembly [sic] of this instruction will
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be 0A, however, explicit modification of this byte will result in
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the operation described above and may alter results.
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This instruction exists in this form on all Intel x86 processors.
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The following related files were saved on February 16, 2015 from [http://www.rcollins.org](http://www.rcollins.org/):
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* [AAM.ASM](AAM.ASM)
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