48 lines
2 KiB
Markdown
48 lines
2 KiB
Markdown
---
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layout: page
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title: "x86 Instructions: AAD"
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permalink: /docs/x86/ops/AAD/
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---
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AAD (0xD5)
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---
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### Description
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Excerpt from [http://www.rcollins.org/secrets/opcodes/AAD.html](http://www.rcollins.org/secrets/opcodes/AAD.html):
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Undocumented: Available to all Intel x86 processors
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Useful in production source code.
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AAD
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Flags: ASCII Adjust before Division
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|O|D|I|T|S|Z|A|P|C| | 11010101 | DATA |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|+| | | |+|+|+|+|+| | D5 | IMM8 |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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This instruction is the multiplication counterpart to AAM. As is the
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case with AAM, AAD uses the second byte as an operand. This operand is
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the multiplicand for AAD. Like AAM, AAD provides a way to execute a
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MUL IMM8 that is unavailable through any other means in the CPU.
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Unlike MUL, or IMUL, AAD sets all of the CPU status flags according
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to the result. Intel states that the Overflow Flag (OF), Auxiliary carry
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Flag (AF), and Carry Flag (CF) are undefined. This assertion is incorrect.
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These flags are fully defined, and are set consistently with respect to
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any other integer operations.
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And again, like AMM, beginning with the Pentium, Intel has finally
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acknowledged the existence of the second byte of this instruction as its
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operand. Intel says:
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Note: imm8 has the value of the instruction's second byte. The
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second byte under normally assembly [sic] of this instruction will
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be 0A, however, explicit modification of this byte will result in
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the operation described above and may alter results.
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This instruction exists in this form on all Intel x86 processors.
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The following related files were saved on February 16, 2015 from [http://www.rcollins.org](http://www.rcollins.org/):
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* [AAD.ASM](AAD.ASM)
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