Renamed flags to be more consistent with DEC's names, and updated JSR and JSP to clear the BIS flag
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bf6d6dcba9
commit
f8bf346eab
6 changed files with 285 additions and 275 deletions
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@ -919,20 +919,23 @@ class DebuggerPDP10 extends Debugger {
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case DebuggerPDP10.REGS.EA:
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value = cpu.regEA;
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break;
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case DebuggerPDP10.REGS.PS:
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value = (cpu.getPS() / PDP10.HALF_SHIFT)|0;
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break;
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case DebuggerPDP10.REGS.C0:
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value = (cpu.regPS & PDP10.PSFLAG.CARRY0)? 1 : 0;
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value = (cpu.regPS & PDP10.PSFLAG.CRY0)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.C1:
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value = (cpu.regPS & PDP10.PSFLAG.CARRY1)? 1 : 0;
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value = (cpu.regPS & PDP10.PSFLAG.CRY1)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.OV:
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value = (cpu.regPS & PDP10.PSFLAG.OVFL)? 1 : 0;
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value = (cpu.regPS & PDP10.PSFLAG.AROV)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.ND:
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value = (cpu.regPS & PDP10.PSFLAG.NO_DIVIDE)? 1 : 0;
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value = (cpu.regPS & PDP10.PSFLAG.DCK)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.PD:
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value = (cpu.regPS & PDP10.PSFLAG.PD_OVFL)? 1 : 0;
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value = (cpu.regPS & PDP10.PSFLAG.PDOV)? 1 : 0;
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break;
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}
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return value;
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@ -955,20 +958,23 @@ class DebuggerPDP10 extends Debugger {
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cpu.setPC(value);
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this.setAddr(this.dbgAddrCode, cpu.getPC());
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break;
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case DebuggerPDP10.REGS.PS:
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cpu.setPS(value * PDP10.HALF_SHIFT);
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break;
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case DebuggerPDP10.REGS.C0:
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flag = PDP10.PSFLAG.CARRY0;
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flag = PDP10.PSFLAG.CRY0;
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break;
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case DebuggerPDP10.REGS.C1:
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flag = PDP10.PSFLAG.CARRY1;
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flag = PDP10.PSFLAG.CRY1;
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break;
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case DebuggerPDP10.REGS.OV:
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flag = PDP10.PSFLAG.OVFL;
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flag = PDP10.PSFLAG.AROV;
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break;
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case DebuggerPDP10.REGS.ND:
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flag = PDP10.PSFLAG.NO_DIVIDE;
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flag = PDP10.PSFLAG.DCK;
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break;
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case DebuggerPDP10.REGS.PD:
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flag = PDP10.PSFLAG.PD_OVFL;
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flag = PDP10.PSFLAG.PDOV;
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break;
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}
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if (flag) {
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@ -4069,15 +4075,16 @@ if (DEBUGGER) {
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PC: 0,
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RA: 1,
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EA: 2,
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C0: 3, // single-bit "register" representing the Carry 0 flag
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C1: 4, // single-bit "register" representing the Carry 1 flag
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OV: 5, // single-bit "register" representing the Overflow flag
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ND: 6, // single-bit "register" representing the No Divide flag
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PD: 7, // single-bit "register" representing the Pushdown Overflow flag
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PS: 3,
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C0: 4, // single-bit "register" representing the Carry 0 flag
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C1: 5, // single-bit "register" representing the Carry 1 flag
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OV: 6, // single-bit "register" representing the Overflow flag
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ND: 7, // single-bit "register" representing the No Divide flag
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PD: 8, // single-bit "register" representing the Pushdown Overflow flag
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};
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DebuggerPDP10.REGNAMES = [
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"PC", "RA", "EA", "C0", "C1", "OV", "ND", "PD"
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"PC", "RA", "EA", "PS", "C0", "C1", "OV", "ND", "PD"
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];
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/*
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