diff --git a/modules/pdp10/lib/cpuops.js b/modules/pdp10/lib/cpuops.js index 87178389c..062e57d31 100644 --- a/modules/pdp10/lib/cpuops.js +++ b/modules/pdp10/lib/cpuops.js @@ -1696,14 +1696,14 @@ PDP10.opASH = function(op, ac) * If all those bits in the original value (w) were 0s, then adding bits to it could NOT * produce a value > INT_MASK. */ - if (w + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (w + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; } else { /* * Since w was negative, overflow occurs ONLY if any of the bits we shifted out were 0s. * If all those bits in the original value (w) were 1s, subtracting bits from it could NOT * produce a value <= INT_MASK. */ - if (w - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (w - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; } } else { if (s <= -35) { @@ -1873,7 +1873,7 @@ PDP10.opASHC = function(op, ac) * other than WORD_MASK indicates an overflow. */ if (wLeft > 0 && wLeft < PDP10.INT_LIMIT || wLeft > PDP10.INT_MASK && wLeft < PDP10.WORD_MASK) { - this.regPS |= PDP10.PSFLAG.OVFL; + this.regPS |= PDP10.PSFLAG.AROV; } if (s >= 71) { /* @@ -1881,7 +1881,7 @@ PDP10.opASHC = function(op, ac) * other than WORD_MASK indicates an overflow. */ if (wRight > 0 && wRight < PDP10.INT_LIMIT || wRight > PDP10.INT_MASK && wRight < PDP10.WORD_MASK) { - this.regPS |= PDP10.PSFLAG.OVFL; + this.regPS |= PDP10.PSFLAG.AROV; } wLeft = 0; } else { @@ -1896,14 +1896,14 @@ PDP10.opASHC = function(op, ac) * If all those bits in the original value were 0s, then adding bits to it could NOT produce * a value > INT_MASK. */ - if (wRight + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (wRight + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; } else { /* * Since wLeft was negative, overflow occurs ONLY if any of the bits we shifted out were 0s. * If all those bits in the original value were 1s, subtracting bits from it could NOT produce * a value <= INT_MASK. */ - if (wRight - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (wRight - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; } } wRight = 0; @@ -1927,14 +1927,14 @@ PDP10.opASHC = function(op, ac) * If all those bits in the original value were 0s, then adding bits to it could NOT produce * a value > INT_MASK. */ - if (wLeftOrig + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (wLeftOrig + bits > PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; } else { /* * Since wLeft was negative, overflow occurs ONLY if any of the bits we shifted out were 0s. * If all those bits in the original value were 1s, subtracting bits from it could NOT produce * a value <= INT_MASK. */ - if (wLeftOrig - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.OVFL; + if (wLeftOrig - bits <= PDP10.INT_MASK) this.regPS |= PDP10.PSFLAG.AROV; /* * Last but not least, update the sign bits of wLeft and wRight to indicate negative values. */ @@ -2372,7 +2372,7 @@ PDP10.opPUSH = function(op, ac) p += 0o000001000001; this.writeWord(p & PDP10.HALF_MASK, this.readWord(this.regEA)); if (p >= PDP10.WORD_LIMIT) p -= PDP10.WORD_LIMIT; - if (!((p / PDP10.HALF_SHIFT)|0)) this.regPS |= PDP10.PSFLAG.PD_OVFL; + if (!((p / PDP10.HALF_SHIFT)|0)) this.regPS |= PDP10.PSFLAG.PDOV; } else { /* * This is the SIMH behavior, which appears to increment each half of AC independently. @@ -2382,7 +2382,7 @@ PDP10.opPUSH = function(op, ac) p = (p + 0o000001000000) - (p & PDP10.HALF_MASK) + addr; if (p >= PDP10.WORD_LIMIT) { p -= PDP10.WORD_LIMIT; - this.regPS |= PDP10.PSFLAG.PD_OVFL; + this.regPS |= PDP10.PSFLAG.PDOV; } } this.writeWord(ac, p); @@ -2412,7 +2412,7 @@ PDP10.opPOP = function(op, ac) if (this.regEA == ac) p = src; // this avoids re-reading the accumulator if the write just overwrote it p -= 0o000001000001; if (p < 0) p += PDP10.WORD_LIMIT; - if (((p / PDP10.HALF_SHIFT)|0) == PDP10.HALF_MASK) this.regPS |= PDP10.PSFLAG.PD_OVFL; + if (((p / PDP10.HALF_SHIFT)|0) == PDP10.HALF_MASK) this.regPS |= PDP10.PSFLAG.PDOV; this.writeWord(ac, p); }; @@ -2448,6 +2448,7 @@ PDP10.opPOPJ = function(op, ac) PDP10.opJSR = function(op, ac) { this.writeWord(this.regEA, this.getPS() + this.getPC()); + this.regPS &= ~PDP10.PSFLAG.BIS; // TODO: Verify that BIS is cleared AFTER writing this.setPC(this.regEA + 1); }; @@ -2471,6 +2472,7 @@ PDP10.opJSR = function(op, ac) PDP10.opJSP = function(op, ac) { this.writeWord(ac, this.getPS() + this.getPC()); + this.regPS &= ~PDP10.PSFLAG.BIS; // TODO: Verify that BIS is cleared AFTER writing this.setPC(this.regEA); }; @@ -2513,7 +2515,7 @@ PDP10.opJSA = function(op, ac) * Place the contents of the location addressed by AC left into AC. Take the next instruction from location E and * continue sequential operation from there. * - * This opcode functions as the counterpart to JSA, but ONLY if location E (the effective address stored in the JRA) indexes + * This opcode functions as the counterpart to JSA, but ONLY if location E (the effective address calculated by the JRA) indexes * with the same AC that was used with the JSA. * * JSA 17,F1 @@ -6119,7 +6121,7 @@ PDP10.doABS = function(src) if (src != PDP10.INT_LIMIT) { src = PDP10.TWO_POW36 - src; } else { - this.regPS |= (PDP10.PSFLAG.OVFL | PDP10.PSFLAG.CARRY1); + this.regPS |= (PDP10.PSFLAG.AROV | PDP10.PSFLAG.CRY1); } } return src; @@ -6181,7 +6183,7 @@ PDP10.doDIV = function(dst, ext, src) } if (ext >= src) { - this.regPS |= PDP10.PSFLAG.NO_DIVIDE | PDP10.PSFLAG.OVFL; + this.regPS |= PDP10.PSFLAG.DCK | PDP10.PSFLAG.AROV; return -1; } @@ -6304,7 +6306,7 @@ PDP10.doMUL = function(dst, src, fTruncate) * If ext is something OTHER than an extension of the res sign bit, then we have overflow. */ if ((ext || res > PDP10.INT_MASK) && (ext != PDP10.WORD_MASK || res <= PDP10.INT_MASK)) { - this.regPS |= PDP10.PSFLAG.OVFL; + this.regPS |= PDP10.PSFLAG.AROV; } /* * Also note that, in the truncate case, we return the low order bits (res), rather than the @@ -6328,7 +6330,7 @@ PDP10.doMUL = function(dst, src, fTruncate) PDP10.doNEG = function(src) { if (!src) { - this.regPS |= (PDP10.PSFLAG.CARRY0 | PDP10.PSFLAG.CARRY1); + this.regPS |= (PDP10.PSFLAG.CRY0 | PDP10.PSFLAG.CRY1); } else { /* @@ -6336,7 +6338,7 @@ PDP10.doNEG = function(src) * the INT_LIMIT case anyway, and since subtraction in that case doesn't alter src, we skip the subtraction. */ if (src == PDP10.INT_LIMIT) { - this.regPS |= (PDP10.PSFLAG.OVFL | PDP10.PSFLAG.CARRY1); + this.regPS |= (PDP10.PSFLAG.AROV | PDP10.PSFLAG.CRY1); } else { src = PDP10.TWO_POW36 - src; } @@ -6423,7 +6425,7 @@ PDP10.split72 = function(res, ext) var signNew = ext - (ext % PDP10.INT_LIMIT); if (sign != signNew) { ext = sign + (ext - signNew); - this.regPS |= PDP10.PSFLAG.OVFL; + this.regPS |= PDP10.PSFLAG.AROV; } this.regExt = res; return ext; @@ -6483,7 +6485,7 @@ PDP10.setAddFlags = function(dst, src, res) * 1 1 1 0 0 0 no */ var fOverflow = ((dst01 ^ res01) & (src01 ^ res01)) & 0b10; - this.regPS |= (fCarry0? PDP10.PSFLAG.CARRY0 : 0) | (fCarry1? PDP10.PSFLAG.CARRY1 : 0) | (fOverflow? PDP10.PSFLAG.OVFL : 0); + this.regPS |= (fCarry0? PDP10.PSFLAG.CRY0 : 0) | (fCarry1? PDP10.PSFLAG.CRY1 : 0) | (fOverflow? PDP10.PSFLAG.AROV : 0); }; /** diff --git a/modules/pdp10/lib/cpustate.js b/modules/pdp10/lib/cpustate.js index ecb494c6b..d4a75c7cb 100644 --- a/modules/pdp10/lib/cpustate.js +++ b/modules/pdp10/lib/cpustate.js @@ -374,11 +374,11 @@ class CPUStatePDP10 extends CPUPDP10 { { w = (w / PDP10.HALF_SHIFT)|0; this.regPS = (this.regPS & ~PDP10.PSFLAG.SET_MASK) | (w & PDP10.PSFLAG.SET_MASK); - this.regPS |= (w & PDP10.PSFLAG.USER_MODE); - if (!(w & PDP10.PSFLAG.USER_IO)) { - this.regPS &= ~PDP10.PSFLAG.USER_IO; + this.regPS |= (w & PDP10.PSFLAG.USERF); + if (!(w & PDP10.PSFLAG.EXIOT)) { + this.regPS &= ~PDP10.PSFLAG.EXIOT; } else { - if (!(this.regPS & PDP10.PSFLAG.USER_MODE)) this.regPS |= PDP10.PSFLAG.USER_IO; + if (!(this.regPS & PDP10.PSFLAG.USERF)) this.regPS |= PDP10.PSFLAG.EXIOT; } } @@ -391,7 +391,7 @@ class CPUStatePDP10 extends CPUPDP10 { */ setUserMode() { - this.regPS |= PDP10.PSFLAG.USER_MODE; + this.regPS |= PDP10.PSFLAG.USERF; } /** @@ -405,8 +405,8 @@ class CPUStatePDP10 extends CPUPDP10 { readFlags() { var flags = 0; - if (this.regPS & PDP10.PSFLAG.OVFL) flags |= PDP10.RFLAG.OVFL; - if (this.regPS & PDP10.PSFLAG.PD_OVFL) flags |= PDP10.RFLAG.PD_OVFL; + if (this.regPS & PDP10.PSFLAG.AROV) flags |= PDP10.RFLAG.AROV; + if (this.regPS & PDP10.PSFLAG.PDOV) flags |= PDP10.RFLAG.PDOV; return flags; } @@ -420,8 +420,8 @@ class CPUStatePDP10 extends CPUPDP10 { */ writeFlags(w) { - if (w & PDP10.WFLAG.OVFL_CL) this.regPS &= ~PDP10.PSFLAG.OVFL; - if (w & PDP10.WFLAG.PD_OVFL_CL) this.regPS &= ~PDP10.PSFLAG.PD_OVFL; + if (w & PDP10.WFLAG.AROV_CL) this.regPS &= ~PDP10.PSFLAG.AROV; + if (w & PDP10.WFLAG.PDOV_CL) this.regPS &= ~PDP10.PSFLAG.PDOV; } /** diff --git a/modules/pdp10/lib/debugger.js b/modules/pdp10/lib/debugger.js index 89d620156..b8d66b27e 100644 --- a/modules/pdp10/lib/debugger.js +++ b/modules/pdp10/lib/debugger.js @@ -919,20 +919,23 @@ class DebuggerPDP10 extends Debugger { case DebuggerPDP10.REGS.EA: value = cpu.regEA; break; + case DebuggerPDP10.REGS.PS: + value = (cpu.getPS() / PDP10.HALF_SHIFT)|0; + break; case DebuggerPDP10.REGS.C0: - value = (cpu.regPS & PDP10.PSFLAG.CARRY0)? 1 : 0; + value = (cpu.regPS & PDP10.PSFLAG.CRY0)? 1 : 0; break; case DebuggerPDP10.REGS.C1: - value = (cpu.regPS & PDP10.PSFLAG.CARRY1)? 1 : 0; + value = (cpu.regPS & PDP10.PSFLAG.CRY1)? 1 : 0; break; case DebuggerPDP10.REGS.OV: - value = (cpu.regPS & PDP10.PSFLAG.OVFL)? 1 : 0; + value = (cpu.regPS & PDP10.PSFLAG.AROV)? 1 : 0; break; case DebuggerPDP10.REGS.ND: - value = (cpu.regPS & PDP10.PSFLAG.NO_DIVIDE)? 1 : 0; + value = (cpu.regPS & PDP10.PSFLAG.DCK)? 1 : 0; break; case DebuggerPDP10.REGS.PD: - value = (cpu.regPS & PDP10.PSFLAG.PD_OVFL)? 1 : 0; + value = (cpu.regPS & PDP10.PSFLAG.PDOV)? 1 : 0; break; } return value; @@ -955,20 +958,23 @@ class DebuggerPDP10 extends Debugger { cpu.setPC(value); this.setAddr(this.dbgAddrCode, cpu.getPC()); break; + case DebuggerPDP10.REGS.PS: + cpu.setPS(value * PDP10.HALF_SHIFT); + break; case DebuggerPDP10.REGS.C0: - flag = PDP10.PSFLAG.CARRY0; + flag = PDP10.PSFLAG.CRY0; break; case DebuggerPDP10.REGS.C1: - flag = PDP10.PSFLAG.CARRY1; + flag = PDP10.PSFLAG.CRY1; break; case DebuggerPDP10.REGS.OV: - flag = PDP10.PSFLAG.OVFL; + flag = PDP10.PSFLAG.AROV; break; case DebuggerPDP10.REGS.ND: - flag = PDP10.PSFLAG.NO_DIVIDE; + flag = PDP10.PSFLAG.DCK; break; case DebuggerPDP10.REGS.PD: - flag = PDP10.PSFLAG.PD_OVFL; + flag = PDP10.PSFLAG.PDOV; break; } if (flag) { @@ -4069,15 +4075,16 @@ if (DEBUGGER) { PC: 0, RA: 1, EA: 2, - C0: 3, // single-bit "register" representing the Carry 0 flag - C1: 4, // single-bit "register" representing the Carry 1 flag - OV: 5, // single-bit "register" representing the Overflow flag - ND: 6, // single-bit "register" representing the No Divide flag - PD: 7, // single-bit "register" representing the Pushdown Overflow flag + PS: 3, + C0: 4, // single-bit "register" representing the Carry 0 flag + C1: 5, // single-bit "register" representing the Carry 1 flag + OV: 6, // single-bit "register" representing the Overflow flag + ND: 7, // single-bit "register" representing the No Divide flag + PD: 8, // single-bit "register" representing the Pushdown Overflow flag }; DebuggerPDP10.REGNAMES = [ - "PC", "RA", "EA", "C0", "C1", "OV", "ND", "PD" + "PC", "RA", "EA", "PS", "C0", "C1", "OV", "ND", "PD" ]; /* diff --git a/modules/pdp10/lib/defines.js b/modules/pdp10/lib/defines.js index 2bdf46711..bf22ce700 100644 --- a/modules/pdp10/lib/defines.js +++ b/modules/pdp10/lib/defines.js @@ -201,21 +201,21 @@ var PDP10 = { * binary, the only options you can set relate to the operating system to be run -- which seems very hacky. */ PSFLAG: { - OVFL: 0o400000, // Overflow - CARRY0: 0o200000, // Carry 0 - CARRY1: 0o100000, // Carry 1 - FP_OVFL: 0o040000, // Floating-Point Overflow - BYTE_INT: 0o020000, // Byte Interrupt - USER_MODE: 0o010000, // Processor is in User Mode - USER_IO: 0o004000, // User I/O - FP_UNFL: 0o000100, // Floating-Point Underflow - NO_DIVIDE: 0o000040, // No Divide - SET_MASK: 0o760140, // the flags that are always settable/clearable + AROV: 0o400000, // Arithmetic Overflow + CRY0: 0o200000, // Carry 0 + CRY1: 0o100000, // Carry 1 + FOV: 0o040000, // Floating-Point Overflow + BIS: 0o020000, // Byte Interrupt + USERF: 0o010000, // User Mode Flag + EXIOT: 0o004000, // User Privileged I/O Flag + FXU: 0o000100, // Floating-Point Underflow + DCK: 0o000040, // Divide Check (aka No Divide) /* * Only the low 18 bits (above) are returned by getPS(); the following (bits 18 to 31) * are defined for internal use only. */ - PD_OVFL: 0o1000000 // Pushdown Overflow + PDOV: 0o1000000, // Pushdown Overflow + SET_MASK: 0o0760140 // flags that are always settable/clearable }, /* @@ -223,18 +223,18 @@ var PDP10 = { */ RFLAG: { PIA: 0o000007, // Priority Interrupt Assignment - OVFL: 0o000010, // Overflow - OVFL_IE: 0o000020, // Overflow Interrupt Enabled + AROV: 0o000010, // Arithmetic Overflow + AROV_IE: 0o000020, // Arithmetic Overflow Interrupt Enabled TRAP_OFF: 0o000040, // Trap Offset - FP_OVFL: 0o000100, // Floating-Point Overflow - FP_OVFL_IE: 0o000200, // Floating-Point Overflow Interrupt Enabled - CLOCK: 0o001000, // Clock Flag - CLOCK_IE: 0o002000, // Clock Interrupt Enabled + FOV: 0o000100, // Floating-Point Overflow + FOV_IE: 0o000200, // Floating-Point Overflow Interrupt Enabled + CLK: 0o001000, // Clock Flag + CLK_IE: 0o002000, // Clock Interrupt Enabled NXM: 0o010000, // Non-Existent Memory PRM: 0o020000, // Memory Protection ADB: 0o040000, // Address Break UIO: 0o100000, // User In-Out - PD_OVFL: 0o200000 // Pushdown Overflow (TODO: Verify this is correct; the May 1968 doc may have a typo) + PDOV: 0o200000 // Pushdown Overflow (TODO: Verify this is correct; the May 1968 doc may have a typo) }, /* @@ -244,20 +244,20 @@ var PDP10 = { */ WFLAG: { PIA: 0o000007, // Priority Interrupt Assignment - OVFL_CL: 0o000010, // Clear Overflow - OVFL_IE: 0o000020, // Enable Overflow Interrupt - OVFL_ID: 0o000040, // Disable Overflow Interrupt - FP_OVFL_CL: 0o000100, // Clear Floating-Point Overflow - FP_OVFL_IE: 0o000200, // Enable Floating-Point Overflow Interrupt - FP_OVFL_ID: 0o000400, // Disable Floating-Point Overflow Interrupt - CLOCK_CL: 0o001000, // Clear Clock Flag - CLOCK_IE: 0o002000, // Enable Clock Interrupt - CLOCK_ID: 0o004000, // Disable Clock Interrupt + AROV_CL: 0o000010, // Clear Overflow + AROV_IE: 0o000020, // Enable Overflow Interrupt + AROV_ID: 0o000040, // Disable Overflow Interrupt + FOV_CL: 0o000100, // Clear Floating-Point Overflow + FOV_IE: 0o000200, // Enable Floating-Point Overflow Interrupt + FOV_ID: 0o000400, // Disable Floating-Point Overflow Interrupt + CLK_CL: 0o001000, // Clear Clock Flag + CLK_IE: 0o002000, // Enable Clock Interrupt + CLK_ID: 0o004000, // Disable Clock Interrupt NXM_CL: 0o010000, // Clear Non-Existent Memory PRM_CL: 0o020000, // Clear Memory Protection ADB_CL: 0o040000, // Clear Address Break UIO_CL: 0o200000, // Clear All In-Out Devices - PD_OVFL_CL: 0o400000 // Clear Pushdown Overflow + PDOV_CL: 0o400000 // Clear Pushdown Overflow }, /* diff --git a/versions/pdpjs/1.34.3/pdp10-dbg.js b/versions/pdpjs/1.34.3/pdp10-dbg.js index b2f2ac39f..d83d608f6 100644 --- a/versions/pdpjs/1.34.3/pdp10-dbg.js +++ b/versions/pdpjs/1.34.3/pdp10-dbg.js @@ -98,192 +98,193 @@ function od(a){var b=+a.model||1001;Yc.call(this,a,1E6);this.Db=b;this.Za=+a.add m.reset=function(){this.status("Model "+this.Db);this.A.O&&this.W();this.Ia=this.Ja=this.b=this.K=0;this.i=this.Da=this.Za;this.I=this.ua=-1;this.F=this.j=0;this.ob=[0,0];this.sa=[0,0];this.ja=[0,0];this.ta=[0,0];this.Ba=this.i;this.C=0;this.f=this.fc;this.g=this.qc;this.Ca=null;ad(this);this.A.error=!1;Yc.prototype.reset.call(this)};m.Ib=function(){return 0}; m.save=function(){var a=new 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