Fixed LGDT and LIDT, fixed read-only memory, and fixed mode transition tests
This commit is contained in:
Jeff Parsons
jeffpar
parent
9ab1f92adc
commit
cfa4e0207f
5 changed files with 158 additions and 104 deletions
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@ -1,6 +1,15 @@
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;
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; This file is designed to run as a ROM replacement, but it has a .COM extension because it's
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; also designed to run as a COM file under DOS (hence the "org 0x100").
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; This file is designed to run both as a test ROM and as a DOS COM file (hence the "org 0x100"),
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; which is why it has a ".com" extension instead of the more typical ".rom" extension.
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;
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; When used as a ROM, it should be installed at physical address 983296 (0xf0100) and aliased at
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; physical address 4294902016 (0xffff0100). The jump at jmpStart should align with the CPU reset
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; address (%0xfffffff0), which will transfer control to 0xf000:0x0100.
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;
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; The code which attempts to update myGDT and addrGDT will have no effect when installed as a ROM,
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; which is fine, because those data structures are predefined with appropriate ROM-based addresses.
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;
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; See the machine definition file in /modules/pcjs/bin/romtests.json for a sample ROM configuration.
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;
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cpu 386
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org 0x100
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@ -8,38 +17,35 @@
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bits 16
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DPL0 equ 0
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DPL1 equ 1
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DPL2 equ 2
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DPL3 equ 3
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ACC_TYPE_SEG equ 0x1000
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ACC_PRESENT equ 0x8000
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ACC_TYPE_CODE equ 0x0800
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ACC_TYPE_READABLE equ 0x0200
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ACC_TYPE_WRITABLE equ 0x0200
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ACC_TYPE_CODE_READABLE equ 0x1a00
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ACC_TYPE_DATA_WRITABLE equ 0x1200
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ACC_TYPE_SEG equ 0x1000
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ACC_PRESENT equ 0x8000
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ACC_TYPE_CODE equ 0x0800
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ACC_TYPE_READABLE equ 0x0200
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ACC_TYPE_WRITABLE equ 0x0200
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ACC_TYPE_CODE_READABLE equ (0x1a00 | ACC_PRESENT)
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ACC_TYPE_DATA_WRITABLE equ (0x1200 | ACC_PRESENT)
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EXT_NONE equ 0x0000
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EXT_BIG equ 0x0040
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EXT_NONE equ 0x0000
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EXT_BIG equ 0x0040
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;
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; We build some data structures in the first page (0x0000-0x0fff) of RAM:
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; If we built our data structures in RAM, we might use the first page of RAM (0x0000-0x0fff) like so:
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;
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; 0x0000-0x03ff Real-mode IDT (256*4)
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; 0x0400-0x0bff Prot-mode IDT (256*8)
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; 0x0c00-0x0cff GDT (enough room for 32 selectors)
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; 0x0d00-0x0d07 IDTR
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; 0x0d08-0x0d0f GDTR
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; 0x0d10-0x0fff reserved
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; 0x0c00-0x0cff RAM_GDT (for 32 GDT selectors)
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; 0x0d00-0x0d07 RAM_IDTR
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; 0x0d08-0x0d0f RAM_GDTR
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; 0x0d10-0x0d13 RAM_RETF (Real-mode return address)
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; 0x0d14-0x0fff reserved
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;
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; And in the second page (0x1000-0x1fff), we build a page directory, followed by a single page table that
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; will allow us to map up to 4Mb (although we'll only create entries for the first 1Mb).
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; And in the second page (0x1000-0x1fff), we might build a page directory, followed by a single page table that
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; allows us to map up to 4Mb (although we'd likely only create PTEs for the first 1Mb).
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;
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RAM_GDT equ 0x0c00
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RAM_IDTR equ 0x0d00
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RAM_GDTR equ 0x0d08
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;RAM_GDT equ 0x0c00
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;RAM_IDTR equ 0x0d00
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;RAM_GDTR equ 0x0d08
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;RAM_RETF equ 0x0d10
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CSEG_REAL equ 0xf000
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CSEG_PROT equ 0x0008
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@ -48,7 +54,7 @@ DSEG_PROT equ 0x0010
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CR0_MSW_PE equ 0x0001
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;
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; set initializes a register to the specified value (eg, "set eax,0")
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; The "set" macro initializes a register to the specified value (eg, "set eax,0")
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;
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%macro set 2
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%ifnum %2
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@ -63,49 +69,45 @@ CR0_MSW_PE equ 0x0001
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%endmacro
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;
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; defDesc defines a descriptor, given a base (%1), limit (%2), type (%3), dpl (%4), and ext (%5)
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;
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%macro defDesc 1-5 0,0,0,0,0
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dw (%2 & 0x0000ffff)
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dw (%1 & 0x0000ffff)
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dw ((%1 & 0x00ff0000) >> 16) | %3 | (%4 << 13)
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dw ((%2 & 0x000f0000) >> 16) | %5 | ((%1 & 0xff000000) >> 16)
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%endmacro
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;
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; setDesc creates a descriptor, given a base (%1), limit (%2), type (%3), ext (%4), and selector (%5)
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; The "defDesc" macro defines a descriptor, given a name (%1), base (%2), limit (%3), type (%4), and ext (%5)
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;
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%assign selDesc 0
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%macro setDesc 1-5 0,0,0,0,none
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set ebx,%1
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set ecx,%2
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set dx,%3
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set ax,%4
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call storeDesc
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%assign %5 selDesc
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%macro defDesc 1-5 none,0,0,0,0
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%assign %1 selDesc
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dw (%3 & 0x0000ffff)
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dw (%2 & 0x0000ffff)
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%if selDesc = 0
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dw ((%2 & 0x00ff0000) >> 16) | %4 | (0 << 13)
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%else
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dw ((%2 & 0x00ff0000) >> 16) | %4 | (0 << 13) | ACC_PRESENT
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%endif
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dw ((%3 & 0x000f0000) >> 16) | %5 | ((%2 & 0xff000000) >> 16)
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%assign selDesc selDesc+8
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%endmacro
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start: cli ; disable all interrupts
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mov al,0xff ; and ensure that no hardware interrupts can sneak in
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out 0x21,al ; if interrupts become enabled later
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out 0xa1,al
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sub ax,ax
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mov ds,ax
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mov es,ax
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mov ss,ax
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mov sp,0x1000
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;
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; The "setDesc" macro creates a descriptor, given a name (%1), base (%2), limit (%3), type (%4), and ext (%5)
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;
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%macro setDesc 1-5 none,0,0,0,0
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%assign %1 selDesc
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set ebx,%2
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set ecx,%3
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set dx,%4
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set ax,%5
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call storeDesc
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%assign selDesc selDesc+8
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%endmacro
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start: nop
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mov eax,0x44332211
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mov ebx,eax
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mov ecx,0x88776655
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mul ecx
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div ecx
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cmp eax,ebx
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je near initRAM ; apparently we have to tell NASM "near" because this is a forward reference
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je near initGDT ; apparently we have to tell NASM "near" because this is a forward reference
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times 32768 nop ; lots of NOPs to force a 16-bit conditional jump
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;
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; storeDesc(EBX=base, ECX=limit, DX=type, AX=ext, DI=address of descriptor)
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;
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@ -119,6 +121,7 @@ storeDesc:
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mov ax,dx
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shr ebx,16
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mov al,bl
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or ax,ACC_PRESENT
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stosw
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pop ax
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shr ecx,16
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@ -128,56 +131,78 @@ storeDesc:
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stosw
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ret
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;
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; The following ROM-based data structures are obsolete, because we build these data structures in RAM now.
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;
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addrGDT:dw romGDTEnd - romGDT - 1 ; 16-bit limit of romGDT
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dw romGDT, 0xffff ; 32-bit base address of romGDT (works as long as we're aliased at 0xffff0000)
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addrGDT:dw myGDTEnd - myGDT - 1 ; 16-bit limit of myGDT
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dw myGDT, 0xffff ; 32-bit base address of myGDT (works as long as we're aliased at 0xffff0000)
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romGDT: defDesc 0 ; the first descriptor in any descriptor table is always a dud (it corresponds to the null descriptor)
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defDesc 0x000f0000,0x0000ffff,ACC_TYPE_CODE_READABLE
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defDesc 0x00000000,0x000fffff,ACC_TYPE_DATA_WRITABLE
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romGDTEnd:
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;
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; End of ROM-based data structures
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; TODO: Why do I need to provide a 2nd parameter for "defDesc NULL"? Is this a NASM 0.98.x bug?
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;
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myGDT: defDesc NULL,0 ; the first descriptor in any descriptor table is always a dud (it corresponds to the null selector)
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defDesc CSEG_PROT,0x000f0000,0x0000ffff,ACC_TYPE_CODE_READABLE,EXT_NONE
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defDesc DSEG_PROT,0x00000000,0x000fffff,ACC_TYPE_DATA_WRITABLE,EXT_NONE
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myGDTEnd:
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initRAM:
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initGDT:
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%ifdef RAM_GDT
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set edi,RAM_GDT
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mov [RAM_GDTR+2],edi
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setDesc 0,0,0,0,NULL
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mov eax,cs
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setDesc NULL
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xor eax,eax
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mov ax,cs
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shl eax,4
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setDesc eax,0x0000ffff,ACC_TYPE_CODE_READABLE,EXT_BIG,CSEG_PROT
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setDesc 0x0,0x000fffff,ACC_TYPE_DATA_WRITABLE,EXT_BIG,DSEG_PROT
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setDesc CSEG_PROT,eax,0x0000ffff,ACC_TYPE_CODE_READABLE,EXT_NONE
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setDesc DSEG_PROT,0x0,0x000fffff,ACC_TYPE_DATA_WRITABLE,EXT_NONE
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sub edi,RAM_GDT
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dec edi
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mov [RAM_GDTR],di
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mov word [RAM_RETF],toReal
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mov word [RAM_RETF+2],cs
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%else
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;
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; This code will have no effect if we're in ROM (in that case, myGDT et al should already be set correctly)
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;
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xor eax,eax
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mov ax,cs
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shl eax,4 ; EAX = base address of the current CS
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mov edx,eax ; save it in EDX
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mov [cs:myGDT+CSEG_PROT+2],ax ; update the base portions of the descriptor for CSEG_PROT
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shr eax,16
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mov [cs:myGDT+CSEG_PROT+4],al
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mov [cs:myGDT+CSEG_PROT+7],ah
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mov eax,edx ; recover the base address of the current CS
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add eax,myGDT ; EAX = physical address of myGDT
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mov [cs:addrGDT+2],eax ; update the 32-bit base address of myGDT in addrGDT
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mov [cs:jmpReal+3],cs ; update the segment of the far jmp that returns us to real-mode
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mov [cs:jmpStart+3],cs ; ditto for the far jmp that returns us to the start of the image
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%endif
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goProt: o32 lgdt [RAM_GDTR]
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goProt: o32 lgdt [cs:addrGDT]
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mov eax,cr0
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or eax,CR0_MSW_PE
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mov cr0,eax
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jmp CSEG_PROT:inProt
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inProt:
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bits 32
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nop
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jmpProt:
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jmp CSEG_PROT:toProt
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toProt: ; bits 32 ; only if we define the CSEG_PROT descriptor with EXT_BIG
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mov ax,DSEG_PROT
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mov ds,ax
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mov es,ax
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mov ss,ax
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;
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; Do some protected-mode tests now...
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;
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goReal: mov eax,cr0
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and eax,~CR0_MSW_PE
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mov cr0,eax
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bits 16
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jmp CSEG_REAL:inReal
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inReal:
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or ax,1
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jnz start ; apparently we do NOT have to say "near" here since this is a backward reference
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nop
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jmpReal:
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jmp CSEG_REAL:toReal
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toReal: ; bits 16 ; only if we define the CSEG_PROT descriptor with EXT_BIG
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mov ax,cs
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cmp ax,CSEG_REAL ; is CS equal to 0xf000?
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je near jmpStart ; yes
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int 0x20 ; no, so assume we're running under DOS and exit
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;
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; Fill the remaining space with NOPs until we get to target offset 0xFFF0.
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@ -185,9 +210,10 @@ inReal:
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;
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times 0xfff0-0x100-($-$$) nop
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jmpStart:
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jmp CSEG_REAL:start
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db 0x20
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db '04/04/15'
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db 0xFC ; 0000FFFE FC (Model ID byte)
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db 0x00 ; 0000FFFF 00 (location of checksum byte)
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db 0xFC ; 0000FFFE FC (Model ID byte)
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db 0x00 ; 0000FFFF 00 (location of checksum byte)
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