Fixed 32-bit protected-mode test code
This commit is contained in:
Jeff Parsons
jeffpar
parent
f36b79cd25
commit
9ab1f92adc
5 changed files with 115 additions and 81 deletions
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@ -972,7 +972,7 @@
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<xsl:template match="computer[not(@ref)]">
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<xsl:param name="machine" select="''"/>
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<xsl:param name="machineState" select="''"/>
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<xsl:variable name="buswidth">
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<xsl:variable name="busWidth">
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<xsl:choose>
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<xsl:when test="@buswidth"><xsl:value-of select="@buswidth"/></xsl:when>
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<xsl:otherwise>20</xsl:otherwise>
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@ -994,7 +994,7 @@
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<xsl:call-template name="component">
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<xsl:with-param name="machine" select="$machine"/>
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<xsl:with-param name="class">computer</xsl:with-param>
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<xsl:with-param name="parms">,buswidth:<xsl:value-of select="$buswidth"/>,resume:<xsl:value-of select="$resume"/>,state:'<xsl:value-of select="$state"/>'</xsl:with-param>
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<xsl:with-param name="parms">,busWidth:<xsl:value-of select="$busWidth"/>,resume:<xsl:value-of select="$resume"/>,state:'<xsl:value-of select="$state"/>'</xsl:with-param>
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</xsl:call-template>
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</xsl:template>
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@ -3134,33 +3134,34 @@ if (DEBUGGER) {
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var sOperand = " ";
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var typeSize = type & Debugger.TYPE_SIZE;
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switch (typeSize) {
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case Debugger.TYPE_BYTE:
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/*
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* There's the occasional immediate byte we don't need to display (eg, the 0x0A
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* following an AAM or AAD instruction), so we suppress the byte if it lacks a TYPE_IN
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* or TYPE_OUT designation (and TYPE_BOTH, as the name implies, includes both).
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*/
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if (type & Debugger.TYPE_BOTH) {
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sOperand = str.toHex(this.getByte(aAddr, 1), 2);
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}
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case Debugger.TYPE_BYTE:
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/*
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* There's the occasional immediate byte we don't need to display (eg, the 0x0A
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* following an AAM or AAD instruction), so we suppress the byte if it lacks a TYPE_IN
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* or TYPE_OUT designation (and TYPE_BOTH, as the name implies, includes both).
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*/
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if (type & Debugger.TYPE_BOTH) {
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sOperand = str.toHex(this.getByte(aAddr, 1), 2);
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}
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break;
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case Debugger.TYPE_SBYTE:
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sOperand = str.toHex((this.getByte(aAddr, 1) << 24) >> 24, 4);
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break;
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case Debugger.TYPE_WORDV:
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if (aAddr[4]) {
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sOperand = str.toHex(this.getLong(aAddr, 4));
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break;
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case Debugger.TYPE_SBYTE:
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sOperand = str.toHex((this.getByte(aAddr, 1) << 24) >> 24, 4);
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break;
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case Debugger.TYPE_WORDV:
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if (aAddr[4]) {
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sOperand = str.toHex(this.getLong(aAddr, 4));
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break;
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}
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/* falls through */
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case Debugger.TYPE_WORD:
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sOperand = str.toHex(this.getShort(aAddr, 2), 4);
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break;
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case Debugger.TYPE_FARP:
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sOperand = this.hexAddr(this.newAddr(this.getWord(aAddr, 2), this.getShort(aAddr, 2), null, aAddr[4], aAddr[5]));
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break;
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default:
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sOperand = "imm(" + str.toHexWord(type) + ")";
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}
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/* falls through */
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case Debugger.TYPE_WORD:
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sOperand = str.toHex(this.getShort(aAddr, 2), 4);
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break;
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case Debugger.TYPE_FARP:
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sOperand = this.hexAddr(this.newAddr(this.getWord(aAddr, 2), this.getShort(aAddr, 2), null, aAddr[4], aAddr[5]));
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break;
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default:
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sOperand = "imm(" + str.toHexWord(type) + ")";
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break;
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}
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return sOperand;
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};
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@ -3345,36 +3346,36 @@ if (DEBUGGER) {
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{
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var b;
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switch (sFlag) {
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case "V":
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b = this.cpu.getOF();
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break;
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case "D":
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b = this.cpu.getDF();
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break;
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case "I":
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b = this.cpu.getIF();
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break;
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case "T":
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b = this.cpu.getTF();
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break;
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case "S":
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b = this.cpu.getSF();
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break;
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case "Z":
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b = this.cpu.getZF();
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break;
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case "A":
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b = this.cpu.getAF();
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break;
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case "P":
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b = this.cpu.getPF();
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break;
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case "C":
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b = this.cpu.getCF();
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break;
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default:
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b = 0;
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break;
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case "V":
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b = this.cpu.getOF();
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break;
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case "D":
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b = this.cpu.getDF();
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break;
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case "I":
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b = this.cpu.getIF();
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break;
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case "T":
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b = this.cpu.getTF();
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break;
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case "S":
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b = this.cpu.getSF();
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break;
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case "Z":
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b = this.cpu.getZF();
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break;
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case "A":
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b = this.cpu.getAF();
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break;
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case "P":
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b = this.cpu.getPF();
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break;
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case "C":
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b = this.cpu.getCF();
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break;
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default:
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b = 0;
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break;
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}
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return sFlag + (b? '1' : '0') + ' ';
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};
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@ -1592,6 +1592,7 @@ X86CPU.prototype.setProtMode = function(fProt)
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if (I386 && this.model >= X86.MODEL_80386) {
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this.segFS.updateMode(fProt);
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this.segGS.updateMode(fProt);
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this.resetSizes();
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}
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};
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@ -925,7 +925,18 @@ X86Seg.prototype.updateMode = function(fProt)
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this.loadIDT = this.loadIDTReal;
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this.checkRead = this.checkReadReal;
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this.checkWrite = this.checkWriteReal;
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this.limit = 0xffff;
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/*
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* Like the base, we don't want to mess with the limit, so that features like "Unreal" mode
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* (or "Big Real" mode as it's called in the HIMEM source code) will work, at least until the
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* next explicit segment load.
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*
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* See http://www.os2museum.com/wp/himem-sys-unreal-mode-and-loadall/ for more details.
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*
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* this.limit = 0xffff;
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*
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* TODO: The checkReadReal() and checkWriteReal() functions need to generate GP faults for offsets
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* beyond the current real-mode limit.
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*/
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this.acc = this.ext = 0;
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this.cpl = this.dpl = 0;
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this.addrDesc = X86.ADDR_INVALID;
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@ -21,6 +21,7 @@ ACC_TYPE_WRITABLE equ 0x0200
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ACC_TYPE_CODE_READABLE equ (0x1a00 | ACC_PRESENT)
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ACC_TYPE_DATA_WRITABLE equ (0x1200 | ACC_PRESENT)
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EXT_NONE equ 0x0000
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EXT_BIG equ 0x0040
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;
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@ -33,7 +34,7 @@ EXT_BIG equ 0x0040
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; 0x0d08-0x0d0f GDTR
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; 0x0d10-0x0fff reserved
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;
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; And in the second page (0x1000-0x1fff), let's build a page directory, followed by a single page table that
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; And in the second page (0x1000-0x1fff), we build a page directory, followed by a single page table that
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; will allow us to map up to 4Mb (although we'll only create entries for the first 1Mb).
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;
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RAM_GDT equ 0x0c00
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@ -50,8 +51,12 @@ CR0_MSW_PE equ 0x0001
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; set initializes a register to the specified value (eg, "set eax,0")
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;
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%macro set 2
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%if %2 = 0
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sub %1,%1
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%ifnum %2
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%if %2 = 0
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xor %1,%1
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%else
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mov %1,%2
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%endif
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%else
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mov %1,%2
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%endif
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@ -60,7 +65,7 @@ CR0_MSW_PE equ 0x0001
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;
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; defDesc defines a descriptor, given a base (%1), limit (%2), type (%3), dpl (%4), and ext (%5)
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;
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%macro defDesc 1-4 0,0,0,0
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%macro defDesc 1-5 0,0,0,0,0
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dw (%2 & 0x0000ffff)
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dw (%1 & 0x0000ffff)
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dw ((%1 & 0x00ff0000) >> 16) | %3 | (%4 << 13)
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@ -68,15 +73,16 @@ CR0_MSW_PE equ 0x0001
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%endmacro
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;
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; setDesc creates a descriptor, given a base (%1), limit (%2), type (%3), dpl (%4), and ext (%5)
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; setDesc creates a descriptor, given a base (%1), limit (%2), type (%3), ext (%4), and selector (%5)
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;
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%assign selDesc 0
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%macro setDesc 1-4 0,0,0,none
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%macro setDesc 1-5 0,0,0,0,none
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set ebx,%1
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set ecx,%2
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set edx,%3
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set dx,%3
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set ax,%4
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call storeDesc
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%assign %4 selDesc
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%assign %5 selDesc
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%assign selDesc selDesc+8
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%endmacro
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@ -99,11 +105,13 @@ start: cli ; disable all interrupts
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cmp eax,ebx
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je near initRAM ; apparently we have to tell NASM "near" because this is a forward reference
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times 32768 nop ; lots of NOPs to force a 16-bit conditional jump
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;
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; storeDesc(EBX=base, ECX=limit, EDX=type, EDI=target)
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; storeDesc(EBX=base, ECX=limit, DX=type, AX=ext, DI=address of descriptor)
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;
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storeDesc:
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cld
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push ax
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mov ax,cx
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stosw ; store the low 16 bits of limit from ECX
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mov ax,bx
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@ -112,13 +120,17 @@ storeDesc:
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shr ebx,16
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mov al,bl
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stosw
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pop ax
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shr ecx,16
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mov al,cl
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and al,0xf
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and cl,0xf
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or al,cl
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mov ah,bh
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stosw
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ret
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;
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; The following ROM-based data structures are obsolete, because we build these data structures in RAM now.
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;
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addrGDT:dw romGDTEnd - romGDT - 1 ; 16-bit limit of romGDT
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dw romGDT, 0xffff ; 32-bit base address of romGDT (works as long as we're aliased at 0xffff0000)
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@ -126,13 +138,18 @@ romGDT: defDesc 0 ; the first descriptor in any descriptor table is always a d
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defDesc 0x000f0000,0x0000ffff,ACC_TYPE_CODE_READABLE
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defDesc 0x00000000,0x000fffff,ACC_TYPE_DATA_WRITABLE
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romGDTEnd:
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;
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; End of ROM-based data structures
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;
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initRAM:
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set edi,RAM_GDT
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mov [RAM_GDTR+2],edi
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setDesc 0,0,0,NULL
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setDesc 0x000f0000,0x0000ffff,ACC_TYPE_CODE_READABLE,CSEG_PROT
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setDesc 0x00000000,0x000fffff,ACC_TYPE_DATA_WRITABLE,DSEG_PROT
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setDesc 0,0,0,0,NULL
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mov eax,cs
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shl eax,4
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setDesc eax,0x0000ffff,ACC_TYPE_CODE_READABLE,EXT_BIG,CSEG_PROT
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setDesc 0x0,0x000fffff,ACC_TYPE_DATA_WRITABLE,EXT_BIG,DSEG_PROT
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sub edi,RAM_GDT
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dec edi
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mov [RAM_GDTR],di
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@ -141,20 +158,25 @@ goProt: o32 lgdt [RAM_GDTR]
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mov eax,cr0
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or eax,CR0_MSW_PE
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mov cr0,eax
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jmp dword CSEG_PROT:inProt
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inProt: mov ax,DSEG_PROT
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jmp CSEG_PROT:inProt
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inProt:
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bits 32
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mov ax,DSEG_PROT
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mov ds,ax
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mov es,ax
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mov ss,ax
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;
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; Do some protected-mode tests...
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; Do some protected-mode tests now...
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;
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goReal: mov eax,cr0
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and eax,~CR0_MSW_PE
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mov cr0,eax
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jmp dword CSEG_REAL:inReal
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inReal: or eax,1
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bits 16
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jmp CSEG_REAL:inReal
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inReal:
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or ax,1
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jnz start ; apparently we do NOT have to say "near" here since this is a backward reference
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;
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@ -163,7 +185,6 @@ inReal: or eax,1
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;
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times 0xfff0-0x100-($-$$) nop
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bits 16
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jmp CSEG_REAL:start
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db 0x20
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