pcem/src/headland.c
TomW 2ca4ead570 Implemented preliminary S3 ViRGE 2D blitter emulation.
Misc ViRGE fixes.
Changes to memory mapping.
Changes to PCI handling.
Disabled 'AMI WinBIOS 486 PCI' due to incomplete chipset emulation.
Invalid GUS register reads no longer kill the emulator.
2014-03-20 14:03:55 +00:00

46 lines
1.5 KiB
C

#include "ibm.h"
#include "io.h"
#include "mem.h"
#include "cpu.h"
#include "headland.h"
static int headland_index;
static uint8_t headland_regs[256];
void headland_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr & 1)
{
if (headland_index == 0xc1 && !is486) val = 0;
headland_regs[headland_index] = val;
pclog("Headland write %02X %02X\n",headland_index,val);
if (headland_index == 0x82)
{
shadowbios = val & 0x10;
shadowbios_write = !(val & 0x10);
if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
}
else
headland_index = val;
}
uint8_t headland_read(uint16_t addr, void *priv)
{
if (addr & 1)
{
if ((headland_index >= 0xc0 || headland_index == 0x20) && cpu_iscyrix)
return 0xff; /*Don't conflict with Cyrix config registers*/
return headland_regs[headland_index];
}
return headland_index;
}
void headland_init()
{
io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
}