8cd1b2d29c
No longer implements CRTC registers beyond 0x18 - NT no longer detects ET4000. RGBA8888 mode supported - fixes NT 32-bit colour mode. Bit order controls supported for CPU 1-bit data - fixes NT 24-bit colour mode.
121 lines
4 KiB
C
121 lines
4 KiB
C
/*ATI 68860 RAMDAC emulation (for Mach64)*/
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/*
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ATI 68860/68880 Truecolor DACs:
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REG08 (R/W):
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bit 0-? Always 2 ??
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REG0A (R/W):
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bit 0-? Always 1Dh ??
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REG0B (R/W): (GMR ?)
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bit 0-7 Mode. 82h: 4bpp, 83h: 8bpp, A0h: 15bpp, A1h: 16bpp, C0h: 24bpp,
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E3h: 32bpp (80h for VGA modes ?)
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REG0C (R/W): Device Setup Register A
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bit 0 Controls 6/8bit DAC. 0: 8bit DAC/LUT, 1: 6bit DAC/LUT
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2-3 Depends on Video memory (= VRAM width ?) . 1: Less than 1Mb, 2: 1Mb,
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3: > 1Mb
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5-6 Always set ?
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7 If set can remove "snow" in some cases (A860_Delay_L ?) ??
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*/
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#include "ibm.h"
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#include "mem.h"
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#include "video.h"
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#include "vid_svga.h"
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#include "vid_ati68860_ramdac.h"
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#include "vid_svga_render.h"
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void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga)
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{
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// pclog("ati68860_out : addr %04X val %02X %04X:%04X\n", addr, val, CS,pc);
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switch (addr)
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{
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case 0:
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svga_out(0x3c8, val, svga);
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break;
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case 1:
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svga_out(0x3c9, val, svga);
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break;
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case 2:
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svga_out(0x3c6, val, svga);
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break;
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case 3:
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svga_out(0x3c7, val, svga);
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break;
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default:
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ramdac->regs[addr & 0xf] = val;
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switch (addr & 0xf)
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{
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case 0xb:
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switch (val)
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{
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case 0x82:
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ramdac->render = svga_render_4bpp_highres;
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break;
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case 0x83:
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ramdac->render = svga_render_8bpp_highres;
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break;
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case 0xa0:
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ramdac->render = svga_render_15bpp_highres;
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break;
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case 0xa1: case 0xb1:
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ramdac->render = svga_render_16bpp_highres;
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break;
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case 0xc0: case 0xd0:
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ramdac->render = svga_render_24bpp_highres;
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break;
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case 0xe2:
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ramdac->render = svga_render_32bpp_highres;
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break;
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case 0xf2:
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ramdac->render = svga_render_RGBA8888_highres;
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break;
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default:
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ramdac->render = svga_render_8bpp_highres;
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break;
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}
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break;
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}
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break;
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}
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}
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uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga)
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{
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uint8_t ret = 0;
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switch (addr)
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{
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case 0:
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ret = svga_in(0x3c8, svga);
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break;
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case 1:
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ret = svga_in(0x3c9, svga);
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break;
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case 2:
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ret = svga_in(0x3c6, svga);
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break;
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case 3:
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ret = svga_in(0x3c7, svga);
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break;
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case 4: case 8:
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ret = 2;
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break;
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case 6: case 0xa:
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ret = 0x1d;
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break;
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case 0xf:
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ret = 0xd0;
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break;
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default:
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ret = ramdac->regs[addr & 0xf];
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break;
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}
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// pclog("ati68860_in : addr %04X ret %02X %04X:%04X\n", addr, ret, CS,pc);
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return ret;
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}
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void ati68860_ramdac_init(ati68860_ramdac_t *ramdac)
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{
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ramdac->render = svga_render_8bpp_highres;
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}
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