Mach64 changes :
No longer implements CRTC registers beyond 0x18 - NT no longer detects ET4000. RGBA8888 mode supported - fixes NT 32-bit colour mode. Bit order controls supported for CPU 1-bit data - fixes NT 24-bit colour mode.
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8cd1b2d29c
5 changed files with 93 additions and 12 deletions
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@ -23,6 +23,7 @@ bit 0 Controls 6/8bit DAC. 0: 8bit DAC/LUT, 1: 6bit DAC/LUT
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#include "video.h"
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#include "vid_svga.h"
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#include "vid_ati68860_ramdac.h"
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#include "vid_svga_render.h"
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void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga)
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{
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@ -43,6 +44,38 @@ void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac,
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break;
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default:
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ramdac->regs[addr & 0xf] = val;
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switch (addr & 0xf)
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{
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case 0xb:
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switch (val)
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{
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case 0x82:
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ramdac->render = svga_render_4bpp_highres;
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break;
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case 0x83:
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ramdac->render = svga_render_8bpp_highres;
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break;
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case 0xa0:
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ramdac->render = svga_render_15bpp_highres;
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break;
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case 0xa1: case 0xb1:
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ramdac->render = svga_render_16bpp_highres;
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break;
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case 0xc0: case 0xd0:
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ramdac->render = svga_render_24bpp_highres;
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break;
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case 0xe2:
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ramdac->render = svga_render_32bpp_highres;
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break;
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case 0xf2:
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ramdac->render = svga_render_RGBA8888_highres;
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break;
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default:
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ramdac->render = svga_render_8bpp_highres;
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break;
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}
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break;
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}
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break;
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}
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}
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@ -81,3 +114,8 @@ uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svg
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// pclog("ati68860_in : addr %04X ret %02X %04X:%04X\n", addr, ret, CS,pc);
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return ret;
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}
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void ati68860_ramdac_init(ati68860_ramdac_t *ramdac)
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{
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ramdac->render = svga_render_8bpp_highres;
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}
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@ -1,7 +1,9 @@
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typedef struct ati68860_ramdac_t
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{
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uint8_t regs[16];
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void (*render)(struct svga_t *svga);
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} ati68860_ramdac_t;
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void ati68860_ramdac_out(uint16_t addr, uint8_t val, ati68860_ramdac_t *ramdac, svga_t *svga);
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uint8_t ati68860_ramdac_in(uint16_t addr, ati68860_ramdac_t *ramdac, svga_t *svga);
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void ati68860_ramdac_init(ati68860_ramdac_t *ramdac);
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@ -11,7 +11,6 @@
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#include "vid_ati68860_ramdac.h"
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#include "vid_ati_eeprom.h"
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#include "vid_ics2595.h"
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#include "vid_svga_render.h"
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//#define MACH64_DEBUG
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@ -182,6 +181,11 @@ enum
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SRC_LINEAR_EN = 4
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};
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enum
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{
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DP_BYTE_PIX_ORDER = (1 << 24)
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};
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static int mach64_width[8] = {0, 0, 0, 1, 1, 2, 2, 0};
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enum
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@ -238,10 +242,12 @@ void mach64_out(uint16_t addr, uint8_t val, void *p)
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break;
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case 0x3D4:
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svga->crtcreg = val & 0x3f;
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svga->crtcreg = val & 0x1f;
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return;
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case 0x3D5:
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if (svga->crtcreg <= 7 && svga->crtc[0x11] & 0x80) return;
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if (svga->crtcreg > 0x18)
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return;
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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@ -281,6 +287,8 @@ uint8_t mach64_in(uint16_t addr, void *p)
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case 0x3D4:
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return svga->crtcreg;
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case 0x3D5:
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if (svga->crtcreg > 0x18)
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return 0xff;
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return svga->crtc[svga->crtcreg];
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}
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return svga_in(addr, svga);
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@ -305,35 +313,36 @@ void mach64_recalctimings(svga_t *svga)
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svga->vblankstart = svga->dispend;
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// svga_htotal <<= 1;
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// svga_hdisp <<= 1;
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svga->rowoffset <<= 1;
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svga->rowoffset <<= 1;
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svga->render = mach64->ramdac.render;
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switch ((mach64->crtc_gen_cntl >> 8) & 7)
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{
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case 1:
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svga->render = svga_render_4bpp_highres;
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// svga->render = svga_render_4bpp_highres;
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svga->hdisp *= 8;
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break;
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case 2:
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svga->render = svga_render_8bpp_highres;
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// svga->render = svga_render_8bpp_highres;
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svga->hdisp *= 8;
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svga->rowoffset /= 2;
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break;
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case 3:
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svga->render = svga_render_15bpp_highres;
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// svga->render = svga_render_15bpp_highres;
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svga->hdisp *= 8;
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//svga_rowoffset *= 2;
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break;
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case 4:
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svga->render = svga_render_16bpp_highres;
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// svga->render = svga_render_16bpp_highres;
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svga->hdisp *= 8;
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//svga_rowoffset *= 2;
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break;
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case 5:
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svga->render = svga_render_24bpp_highres;
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// svga->render = svga_render_24bpp_highres;
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svga->hdisp *= 8;
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svga->rowoffset = (svga->rowoffset * 3) / 2;
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break;
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case 6:
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svga->render = svga_render_32bpp_highres;
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// svga->render = svga_render_32bpp_highres;
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svga->hdisp *= 8;
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svga->rowoffset *= 2;
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break;
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@ -706,8 +715,16 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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switch (mach64->accel.source_mix)
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{
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case MONO_SRC_HOST:
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mix = cpu_dat >> 31;
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cpu_dat <<= 1;
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if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER)
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{
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mix = cpu_dat & 1;
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cpu_dat >>= 1;
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}
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else
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{
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mix = cpu_dat >> 31;
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cpu_dat <<= 1;
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}
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break;
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case MONO_SRC_PAT:
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mix = mach64->accel.pattern[dst_y & 7][dst_x & 7];
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@ -1722,7 +1739,7 @@ void mach64_ext_writel(uint32_t addr, uint32_t val, void *p)
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case 0x210: case 0x214: case 0x218: case 0x21c:
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case 0x220: case 0x224: case 0x228: case 0x22c:
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case 0x230: case 0x234: case 0x238: case 0x23c:
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if (mach64->accel.source_host)
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if (mach64->accel.source_host || (mach64->dp_pix_width & DP_BYTE_PIX_ORDER))
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mach64_blit(val, 32, mach64);
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else
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mach64_blit(((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), 32, mach64);
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@ -2243,6 +2260,8 @@ void *mach64gx_init()
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ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1);
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ati68860_ramdac_init(&mach64->ramdac);
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mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/
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mach64->dst_cntl = 3;
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@ -638,3 +638,24 @@ void svga_render_32bpp_highres(svga_t *svga)
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}
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}
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void svga_render_RGBA8888_highres(svga_t *svga)
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{
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if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange)
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{
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int x;
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int offset = (8 - ((svga->scrollcache & 6) >> 1)) + 24;
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uint32_t *p = &((uint32_t *)buffer32->line[svga->displine])[offset];
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if (svga->firstline_draw == 2000)
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svga->firstline_draw = svga->displine;
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svga->lastline_draw = svga->displine;
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for (x = 0; x <= svga->hdisp; x++)
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{
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uint32_t dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vrammask]);
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p[x] = dat >> 8;
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}
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svga->ma += 4;
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svga->ma &= svga->vrammask;
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}
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}
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@ -27,5 +27,6 @@ void svga_render_24bpp_lowres(svga_t *svga);
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void svga_render_24bpp_highres(svga_t *svga);
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void svga_render_32bpp_lowres(svga_t *svga);
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void svga_render_32bpp_highres(svga_t *svga);
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void svga_render_RGBA8888_highres(svga_t *svga);
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extern void (*svga_render)(svga_t *svga);
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