Author	SHA1	Message	Date
SarahW	c81a91fd72	Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%).	2016-04-20 21:39:41 +01:00
TomW	f3607c2308	Added code generation for : ... - FCOM/FUCOM - FSUBR/FSUBRP/FDIVR/FDIVRP - FLDCW/FSTCW - FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants) - FLD/FST/FSTP double precision - Integer and double precision variants of FADD/FSUB/FMUL/FDIV Also added 64-bit readmemq/writememq functions.	2015-06-13 16:14:35 +01:00
TomW	2905c43db8	Cycle counts for recompiled blocks now generated at compile time.	2014-11-12 19:33:49 +00:00
TomW	4676daade4	Initial commit of dynamic recompiler. ... Various CPU changes to support dynamic recompiler.	2014-11-05 21:24:16 +00:00
TomW	119fe36820	Added MMX emulation (probably some bugs). Implemented RDMSR/WRMSR for Winchip.	2013-08-03 15:05:50 +01:00