SarahW
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c81a91fd72
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Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%).
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2016-04-20 21:39:41 +01:00 |
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TomW
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133c9d389a
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MMX 64-bit MOV instructions now handle faults correctly.
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2015-09-12 18:57:38 +01:00 |
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TomW
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d4247023a9
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MMX 64-bit stores now count cycles.
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2015-08-22 14:21:53 +01:00 |
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TomW
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f3607c2308
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Added code generation for :
- FCOM/FUCOM
- FSUBR/FSUBRP/FDIVR/FDIVRP
- FLDCW/FSTCW
- FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants)
- FLD/FST/FSTP double precision
- Integer and double precision variants of FADD/FSUB/FMUL/FDIV
Also added 64-bit readmemq/writememq functions.
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2015-06-13 16:14:35 +01:00 |
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TomW
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2905c43db8
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Cycle counts for recompiled blocks now generated at compile time.
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2014-11-12 19:33:49 +00:00 |
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TomW
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4676daade4
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Initial commit of dynamic recompiler.
Various CPU changes to support dynamic recompiler.
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2014-11-05 21:24:16 +00:00 |
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TomW
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cd2c3b47ed
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Implemented selector limits on some instructions - fixes LBA2.
GPFs in real mode now work.
Selectors correctly zeroed on far return to lower privilege.
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2014-08-13 20:33:56 +01:00 |
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TomW
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119fe36820
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Added MMX emulation (probably some bugs). Implemented RDMSR/WRMSR for Winchip.
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2013-08-03 15:05:50 +01:00 |
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