SarahW
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6d8af5df4a
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Added recompiled versions of memory variants of F[I]ADD, F[I]DIV, F[I]DIVR, F[I]MUL, F[I]SUB and F[I]SUBR.
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2018-10-20 20:03:28 +01:00 |
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SarahW
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8a516df476
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Added recompiled versions of FLD, FILD, FST and FSTP.
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2018-10-17 19:47:04 +01:00 |
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SarahW
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305b6cc4fd
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Added recompiled register versions of FADDP, FDIVP, FDIVRP, FMULP, FSUBP and FSUBRP.
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2018-10-08 21:44:30 +01:00 |
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SarahW
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78996b3e5c
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Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
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2018-10-07 22:02:31 +01:00 |
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SarahW
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f1df9be8f6
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Added recompiled versions of JMP, CALL, RET, PUSH and POP.
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2018-08-05 16:24:15 +01:00 |
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SarahW
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fc27be592c
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Added recompiled versions of immediate->reg and reg->reg versions of MOV, ADD, SUB, CMP, AND, OR and XOR.
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2018-07-08 16:36:11 +01:00 |
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SarahW
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a883399781
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Added AGI stalls to 486 and later CPUs.
Reworked codegen timing a bit - split timing tables into CPU-specific and generic files.
A few other timing tweaks.
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2017-07-23 17:41:24 +01:00 |
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SarahW
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a96e87527e
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Reorganised REP instructions.
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2017-07-20 21:06:21 +01:00 |
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TomW
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f3607c2308
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Added code generation for :
- FCOM/FUCOM
- FSUBR/FSUBRP/FDIVR/FDIVRP
- FLDCW/FSTCW
- FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants)
- FLD/FST/FSTP double precision
- Integer and double precision variants of FADD/FSUB/FMUL/FDIV
Also added 64-bit readmemq/writememq functions.
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2015-06-13 16:14:35 +01:00 |
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TomW
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15bca849c8
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Added code generation for first batch of FPU instructions; instructions added are most common instructions used in Quake.
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2015-04-19 08:42:04 +01:00 |
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TomW
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bbf0011e95
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Added code generation for JCXZ, LOOP, JE, JNE, JS, JNS, JB, JNB, JO, JNO, JP and JNP.
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2015-04-14 20:40:40 +01:00 |
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TomW
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630592125c
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Added code generation for immediate->register and register versions of MOV, XCHG, ADD, SUB, AND, OR, XOR, TEST, CMP, INC and DEC.
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2015-01-16 21:22:14 +00:00 |
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