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Rename FPU stack-based integer mirror registers, to avoid confusion with non-stack-based MMX registers.

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This commit is contained in:
SarahW 2018-11-21 12:44:47 +00:00
commit f545d9d57f
4 changed files with 27 additions and 27 deletions
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16
src/codegen_reg.c
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@ -114,14 +114,14 @@ struct
[IREG_tag6] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER},
[IREG_tag7] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER},
[IREG_MM0] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM1] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM2] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM3] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM4] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM5] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM6] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_MM7] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST0_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST1_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST2_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST3_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST4_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST5_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST6_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_ST7_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP},
[IREG_NPXCx] = {REG_WORD, &cpu_state.npxc, REG_INTEGER},
[IREG_NPXSx] = {REG_WORD, &cpu_state.npxs, REG_INTEGER},