Move some more variables into cpu_state structure. Minor speedup (~2%).
This commit is contained in:
SarahW
parent
a65411466e
commit
c664682758
43 changed files with 801 additions and 810 deletions
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@ -80,32 +80,32 @@ static int opFSTP(uint32_t fetchdat)
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static int FSTOR()
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{
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FP_ENTER();
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switch ((cr0 & 1) | (op32 & 0x100))
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switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
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{
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case 0x000: /*16-bit real mode*/
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case 0x001: /*16-bit protected mode*/
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npxc = readmemw(easeg, eaaddr);
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npxs = readmemw(easeg, eaaddr+2);
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x87_settag(readmemw(easeg, eaaddr+4));
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npxc = readmemw(easeg, cpu_state.eaaddr);
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npxs = readmemw(easeg, cpu_state.eaaddr+2);
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x87_settag(readmemw(easeg, cpu_state.eaaddr+4));
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TOP = (npxs >> 11) & 7;
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eaaddr += 14;
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cpu_state.eaaddr += 14;
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break;
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case 0x100: /*32-bit real mode*/
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case 0x101: /*32-bit protected mode*/
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npxc = readmemw(easeg, eaaddr);
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npxs = readmemw(easeg, eaaddr+4);
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x87_settag(readmemw(easeg, eaaddr+8));
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npxc = readmemw(easeg, cpu_state.eaaddr);
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npxs = readmemw(easeg, cpu_state.eaaddr+4);
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x87_settag(readmemw(easeg, cpu_state.eaaddr+8));
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TOP = (npxs >> 11) & 7;
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eaaddr += 28;
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cpu_state.eaaddr += 28;
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break;
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}
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x87_ldmmx(&MM[0]); x87_ld_frstor(0); eaaddr += 10;
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x87_ldmmx(&MM[1]); x87_ld_frstor(1); eaaddr += 10;
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x87_ldmmx(&MM[2]); x87_ld_frstor(2); eaaddr += 10;
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x87_ldmmx(&MM[3]); x87_ld_frstor(3); eaaddr += 10;
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x87_ldmmx(&MM[4]); x87_ld_frstor(4); eaaddr += 10;
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x87_ldmmx(&MM[5]); x87_ld_frstor(5); eaaddr += 10;
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x87_ldmmx(&MM[6]); x87_ld_frstor(6); eaaddr += 10;
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x87_ldmmx(&MM[0]); x87_ld_frstor(0); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[1]); x87_ld_frstor(1); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[2]); x87_ld_frstor(2); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[3]); x87_ld_frstor(3); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[4]); x87_ld_frstor(4); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[5]); x87_ld_frstor(5); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[6]); x87_ld_frstor(6); cpu_state.eaaddr += 10;
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x87_ldmmx(&MM[7]); x87_ld_frstor(7);
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ismmx = 0;
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@ -117,7 +117,7 @@ static int FSTOR()
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ismmx = 1;
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CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
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if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, eaaddr, ismmx, TOP, x87_gettag());
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if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, ismmx, TOP, x87_gettag());
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return abrt;
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}
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static int opFSTOR_a16(uint32_t fetchdat)
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@ -138,133 +138,133 @@ static int opFSTOR_a32(uint32_t fetchdat)
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static int FSAVE()
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{
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FP_ENTER();
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if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, eaaddr, ismmx);
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if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, ismmx);
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npxs = (npxs & ~(7 << 11)) | (TOP << 11);
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switch ((cr0&1)|(op32&0x100))
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switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
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{
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case 0x000: /*16-bit real mode*/
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writememw(easeg,eaaddr,npxc);
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writememw(easeg,eaaddr+2,npxs);
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writememw(easeg,eaaddr+4,x87_gettag());
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writememw(easeg,eaaddr+6,x87_pc_off);
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writememw(easeg,eaaddr+10,x87_op_off);
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eaaddr+=14;
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writememw(easeg,cpu_state.eaaddr,npxc);
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writememw(easeg,cpu_state.eaaddr+2,npxs);
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writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
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writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
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writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
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cpu_state.eaaddr+=14;
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if (ismmx)
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{
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x87_stmmx(MM[0]); eaaddr+=10;
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x87_stmmx(MM[1]); eaaddr+=10;
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x87_stmmx(MM[2]); eaaddr+=10;
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x87_stmmx(MM[3]); eaaddr+=10;
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x87_stmmx(MM[4]); eaaddr+=10;
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x87_stmmx(MM[5]); eaaddr+=10;
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x87_stmmx(MM[6]); eaaddr+=10;
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x87_stmmx(MM[0]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[1]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[2]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[3]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[4]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[5]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[6]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[7]);
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}
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else
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{
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x87_st_fsave(0); eaaddr+=10;
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x87_st_fsave(1); eaaddr+=10;
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x87_st_fsave(2); eaaddr+=10;
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x87_st_fsave(3); eaaddr+=10;
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x87_st_fsave(4); eaaddr+=10;
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x87_st_fsave(5); eaaddr+=10;
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x87_st_fsave(6); eaaddr+=10;
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x87_st_fsave(0); cpu_state.eaaddr+=10;
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x87_st_fsave(1); cpu_state.eaaddr+=10;
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x87_st_fsave(2); cpu_state.eaaddr+=10;
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x87_st_fsave(3); cpu_state.eaaddr+=10;
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x87_st_fsave(4); cpu_state.eaaddr+=10;
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x87_st_fsave(5); cpu_state.eaaddr+=10;
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x87_st_fsave(6); cpu_state.eaaddr+=10;
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x87_st_fsave(7);
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}
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break;
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case 0x001: /*16-bit protected mode*/
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writememw(easeg,eaaddr,npxc);
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writememw(easeg,eaaddr+2,npxs);
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writememw(easeg,eaaddr+4,x87_gettag());
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writememw(easeg,eaaddr+6,x87_pc_off);
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writememw(easeg,eaaddr+8,x87_pc_seg);
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writememw(easeg,eaaddr+10,x87_op_off);
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writememw(easeg,eaaddr+12,x87_op_seg);
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eaaddr+=14;
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writememw(easeg,cpu_state.eaaddr,npxc);
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writememw(easeg,cpu_state.eaaddr+2,npxs);
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writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
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writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
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writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg);
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writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
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writememw(easeg,cpu_state.eaaddr+12,x87_op_seg);
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cpu_state.eaaddr+=14;
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if (ismmx)
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{
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x87_stmmx(MM[0]); eaaddr+=10;
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x87_stmmx(MM[1]); eaaddr+=10;
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x87_stmmx(MM[2]); eaaddr+=10;
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x87_stmmx(MM[3]); eaaddr+=10;
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x87_stmmx(MM[4]); eaaddr+=10;
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x87_stmmx(MM[5]); eaaddr+=10;
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x87_stmmx(MM[6]); eaaddr+=10;
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x87_stmmx(MM[0]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[1]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[2]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[3]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[4]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[5]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[6]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[7]);
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}
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else
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{
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x87_st_fsave(0); eaaddr+=10;
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x87_st_fsave(1); eaaddr+=10;
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x87_st_fsave(2); eaaddr+=10;
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x87_st_fsave(3); eaaddr+=10;
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x87_st_fsave(4); eaaddr+=10;
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x87_st_fsave(5); eaaddr+=10;
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x87_st_fsave(6); eaaddr+=10;
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x87_st_fsave(0); cpu_state.eaaddr+=10;
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x87_st_fsave(1); cpu_state.eaaddr+=10;
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x87_st_fsave(2); cpu_state.eaaddr+=10;
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x87_st_fsave(3); cpu_state.eaaddr+=10;
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x87_st_fsave(4); cpu_state.eaaddr+=10;
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x87_st_fsave(5); cpu_state.eaaddr+=10;
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x87_st_fsave(6); cpu_state.eaaddr+=10;
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x87_st_fsave(7);
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}
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break;
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case 0x100: /*32-bit real mode*/
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writememw(easeg,eaaddr,npxc);
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writememw(easeg,eaaddr+4,npxs);
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writememw(easeg,eaaddr+8,x87_gettag());
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writememw(easeg,eaaddr+12,x87_pc_off);
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writememw(easeg,eaaddr+20,x87_op_off);
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writememl(easeg,eaaddr+24,(x87_op_off>>16)<<12);
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eaaddr+=28;
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writememw(easeg,cpu_state.eaaddr,npxc);
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writememw(easeg,cpu_state.eaaddr+4,npxs);
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writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
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writememw(easeg,cpu_state.eaaddr+12,x87_pc_off);
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writememw(easeg,cpu_state.eaaddr+20,x87_op_off);
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writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12);
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cpu_state.eaaddr+=28;
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if (ismmx)
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{
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x87_stmmx(MM[0]); eaaddr+=10;
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x87_stmmx(MM[1]); eaaddr+=10;
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x87_stmmx(MM[2]); eaaddr+=10;
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x87_stmmx(MM[3]); eaaddr+=10;
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x87_stmmx(MM[4]); eaaddr+=10;
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x87_stmmx(MM[5]); eaaddr+=10;
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x87_stmmx(MM[6]); eaaddr+=10;
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x87_stmmx(MM[0]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[1]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[2]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[3]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[4]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[5]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[6]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[7]);
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}
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else
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{
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x87_st_fsave(0); eaaddr+=10;
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x87_st_fsave(1); eaaddr+=10;
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x87_st_fsave(2); eaaddr+=10;
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x87_st_fsave(3); eaaddr+=10;
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x87_st_fsave(4); eaaddr+=10;
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x87_st_fsave(5); eaaddr+=10;
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x87_st_fsave(6); eaaddr+=10;
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x87_st_fsave(0); cpu_state.eaaddr+=10;
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x87_st_fsave(1); cpu_state.eaaddr+=10;
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x87_st_fsave(2); cpu_state.eaaddr+=10;
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x87_st_fsave(3); cpu_state.eaaddr+=10;
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x87_st_fsave(4); cpu_state.eaaddr+=10;
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x87_st_fsave(5); cpu_state.eaaddr+=10;
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x87_st_fsave(6); cpu_state.eaaddr+=10;
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x87_st_fsave(7);
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}
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break;
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case 0x101: /*32-bit protected mode*/
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writememw(easeg,eaaddr,npxc);
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writememw(easeg,eaaddr+4,npxs);
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writememw(easeg,eaaddr+8,x87_gettag());
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writememl(easeg,eaaddr+12,x87_pc_off);
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writememl(easeg,eaaddr+16,x87_pc_seg);
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writememl(easeg,eaaddr+20,x87_op_off);
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writememl(easeg,eaaddr+24,x87_op_seg);
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eaaddr+=28;
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writememw(easeg,cpu_state.eaaddr,npxc);
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writememw(easeg,cpu_state.eaaddr+4,npxs);
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writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
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writememl(easeg,cpu_state.eaaddr+12,x87_pc_off);
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writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg);
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writememl(easeg,cpu_state.eaaddr+20,x87_op_off);
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writememl(easeg,cpu_state.eaaddr+24,x87_op_seg);
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cpu_state.eaaddr+=28;
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if (ismmx)
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{
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x87_stmmx(MM[0]); eaaddr+=10;
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x87_stmmx(MM[1]); eaaddr+=10;
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x87_stmmx(MM[2]); eaaddr+=10;
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x87_stmmx(MM[3]); eaaddr+=10;
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x87_stmmx(MM[4]); eaaddr+=10;
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x87_stmmx(MM[5]); eaaddr+=10;
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x87_stmmx(MM[6]); eaaddr+=10;
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x87_stmmx(MM[0]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[1]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[2]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[3]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[4]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[5]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[6]); cpu_state.eaaddr+=10;
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x87_stmmx(MM[7]);
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}
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else
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{
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x87_st_fsave(0); eaaddr+=10;
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x87_st_fsave(1); eaaddr+=10;
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x87_st_fsave(2); eaaddr+=10;
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x87_st_fsave(3); eaaddr+=10;
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x87_st_fsave(4); eaaddr+=10;
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x87_st_fsave(5); eaaddr+=10;
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x87_st_fsave(6); eaaddr+=10;
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x87_st_fsave(0); cpu_state.eaaddr+=10;
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x87_st_fsave(1); cpu_state.eaaddr+=10;
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x87_st_fsave(2); cpu_state.eaaddr+=10;
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x87_st_fsave(3); cpu_state.eaaddr+=10;
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x87_st_fsave(4); cpu_state.eaaddr+=10;
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x87_st_fsave(5); cpu_state.eaaddr+=10;
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x87_st_fsave(6); cpu_state.eaaddr+=10;
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x87_st_fsave(7);
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}
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break;
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@ -291,7 +291,7 @@ static int opFSTSW_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw((npxs & 0xC7FF) | (TOP << 11));
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CLOCK_CYCLES(3);
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return abrt;
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@ -300,7 +300,7 @@ static int opFSTSW_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw((npxs & 0xC7FF) | (TOP << 11));
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CLOCK_CYCLES(3);
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return abrt;
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@ -659,21 +659,21 @@ static int opFCOS(uint32_t fetchdat)
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static int FLDENV()
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{
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FP_ENTER();
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if (fplog) pclog("FLDENV %08X:%08X\n", easeg, eaaddr);
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switch ((cr0 & 1) | (op32 & 0x100))
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if (fplog) pclog("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr);
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switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
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{
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case 0x000: /*16-bit real mode*/
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case 0x001: /*16-bit protected mode*/
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npxc = readmemw(easeg, eaaddr);
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npxs = readmemw(easeg, eaaddr+2);
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x87_settag(readmemw(easeg, eaaddr+4));
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npxc = readmemw(easeg, cpu_state.eaaddr);
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npxs = readmemw(easeg, cpu_state.eaaddr+2);
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x87_settag(readmemw(easeg, cpu_state.eaaddr+4));
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TOP = (npxs >> 11) & 7;
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break;
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case 0x100: /*32-bit real mode*/
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case 0x101: /*32-bit protected mode*/
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npxc = readmemw(easeg, eaaddr);
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npxs = readmemw(easeg, eaaddr+4);
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x87_settag(readmemw(easeg, eaaddr+8));
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npxc = readmemw(easeg, cpu_state.eaaddr);
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npxs = readmemw(easeg, cpu_state.eaaddr+4);
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x87_settag(readmemw(easeg, cpu_state.eaaddr+8));
|
||||
TOP = (npxs >> 11) & 7;
|
||||
break;
|
||||
}
|
||||
|
|
@ -701,7 +701,7 @@ static int opFLDCW_a16(uint32_t fetchdat)
|
|||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, eaaddr);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempw = geteaw();
|
||||
if (abrt) return 1;
|
||||
npxc = tempw;
|
||||
|
|
@ -713,7 +713,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
|
|||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, eaaddr);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempw = geteaw();
|
||||
if (abrt) return 1;
|
||||
npxc = tempw;
|
||||
|
|
@ -724,41 +724,41 @@ static int opFLDCW_a32(uint32_t fetchdat)
|
|||
static int FSTENV()
|
||||
{
|
||||
FP_ENTER();
|
||||
if (fplog) pclog("FSTENV %08X:%08X\n", easeg, eaaddr);
|
||||
switch ((cr0 & 1) | (op32 & 0x100))
|
||||
if (fplog) pclog("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
writememw(easeg,eaaddr,npxc);
|
||||
writememw(easeg,eaaddr+2,npxs);
|
||||
writememw(easeg,eaaddr+4,x87_gettag());
|
||||
writememw(easeg,eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,eaaddr+10,x87_op_off);
|
||||
writememw(easeg,cpu_state.eaaddr,npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
break;
|
||||
case 0x001: /*16-bit protected mode*/
|
||||
writememw(easeg,eaaddr,npxc);
|
||||
writememw(easeg,eaaddr+2,npxs);
|
||||
writememw(easeg,eaaddr+4,x87_gettag());
|
||||
writememw(easeg,eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,eaaddr+8,x87_pc_seg);
|
||||
writememw(easeg,eaaddr+10,x87_op_off);
|
||||
writememw(easeg,eaaddr+12,x87_op_seg);
|
||||
writememw(easeg,cpu_state.eaaddr,npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_op_seg);
|
||||
break;
|
||||
case 0x100: /*32-bit real mode*/
|
||||
writememw(easeg,eaaddr,npxc);
|
||||
writememw(easeg,eaaddr+4,npxs);
|
||||
writememw(easeg,eaaddr+8,x87_gettag());
|
||||
writememw(easeg,eaaddr+12,x87_pc_off);
|
||||
writememw(easeg,eaaddr+20,x87_op_off);
|
||||
writememl(easeg,eaaddr+24,(x87_op_off>>16)<<12);
|
||||
writememw(easeg,cpu_state.eaaddr,npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12);
|
||||
break;
|
||||
case 0x101: /*32-bit protected mode*/
|
||||
writememw(easeg,eaaddr,npxc);
|
||||
writememw(easeg,eaaddr+4,npxs);
|
||||
writememw(easeg,eaaddr+8,x87_gettag());
|
||||
writememl(easeg,eaaddr+12,x87_pc_off);
|
||||
writememl(easeg,eaaddr+16,x87_pc_seg);
|
||||
writememl(easeg,eaaddr+20,x87_op_off);
|
||||
writememl(easeg,eaaddr+24,x87_op_seg);
|
||||
writememw(easeg,cpu_state.eaaddr,npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememl(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg);
|
||||
writememl(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,x87_op_seg);
|
||||
break;
|
||||
}
|
||||
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
|
||||
|
|
@ -784,7 +784,7 @@ static int opFSTCW_a16(uint32_t fetchdat)
|
|||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw(npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return abrt;
|
||||
|
|
@ -793,7 +793,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
|
|||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw(npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return abrt;
|
||||
|
|
|
|||
Loading…
Reference in a new issue