diff --git a/src/386.c b/src/386.c index 1058807..9fb9686 100644 --- a/src/386.c +++ b/src/386.c @@ -15,8 +15,6 @@ extern int codegen_flags_changed; -x86seg *ea_seg; - extern int nmi_enable; int inscounts[256]; @@ -53,8 +51,6 @@ int inttype,abrt; uint32_t oldcs2; uint32_t oldecx; -uint32_t op32; - uint32_t *eal_r, *eal_w; @@ -64,8 +60,8 @@ uint32_t *mod1seg[8]; static inline void fetch_ea_32_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; if (cpu_rm == 4) { uint8_t sib = rmdat >> 8; @@ -73,60 +69,60 @@ static inline void fetch_ea_32_long(uint32_t rmdat) switch (cpu_mod) { case 0: - eaaddr = cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = cpu_state.regs[sib & 7].l; cpu_state.pc++; break; case 1: cpu_state.pc++; - eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l; // pc++; break; case 2: - eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l; cpu_state.pc += 5; break; } /*SIB byte present*/ if ((sib & 7) == 5 && !cpu_mod) - eaaddr = getlong(); - else if ((sib & 6) == 4 && !ssegs) + cpu_state.eaaddr = getlong(); + else if ((sib & 6) == 4 && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } if (((sib >> 3) & 7) != 4) - eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); + cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); } else { - eaaddr = cpu_state.regs[cpu_rm].l; + cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; if (cpu_mod) { - if (cpu_rm == 5 && !ssegs) + if (cpu_rm == 5 && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } if (cpu_mod == 1) { - eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); + cpu_state.eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); cpu_state.pc++; } else { - eaaddr += getlong(); + cpu_state.eaaddr += getlong(); } } else if (cpu_rm == 5) { - eaaddr = getlong(); + cpu_state.eaaddr = getlong(); } } - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) @@ -137,38 +133,38 @@ static inline void fetch_ea_32_long(uint32_t rmdat) static inline void fetch_ea_16_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; if (!cpu_mod && cpu_rm == 6) { - eaaddr = getword(); + cpu_state.eaaddr = getword(); } else { switch (cpu_mod) { case 0: - eaaddr = 0; + cpu_state.eaaddr = 0; break; case 1: - eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++; + cpu_state.eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++; break; case 2: - eaaddr = getword(); + cpu_state.eaaddr = getword(); break; } - eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); - if (mod1seg[cpu_rm] == &ss && !ssegs) + cpu_state.eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); + if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } - eaaddr &= 0xFFFF; + cpu_state.eaaddr &= 0xFFFF; } - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) @@ -238,14 +234,14 @@ void exec386(int cycs) // oldpc2=oldpc; opcode_realstart: oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcpl=CPL; - op32=use32; + cpu_state.op32 = use32; dontprint=0; - ea_seg = &_ds; - ssegs = 0; + cpu_state.ea_seg = &_ds; + cpu_state.ssegs = 0; opcodestart: fetchdat = fastreadl(cs + cpu_state.pc); @@ -261,7 +257,7 @@ opcodestart: pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X %02X%02X %02X\n",CS,cs,cpu_state.pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0xB270+0x3F5], ram[0xB270+0x3F4], ram[0xB270+0x3F7], ram[0xB270+0x3F6], ram[0xB270+0x3F9], ram[0xB270+0x3F8], ram[0x4430+0x0D49]); } cpu_state.pc++; - x86_opcodes[(opcode | op32) & 0x3ff](fetchdat); + x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); } if (!use32) cpu_state.pc &= 0xffff; @@ -287,7 +283,7 @@ opcodestart: { abrt = 0; CS = oldcs; - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; pclog("Double fault %i\n", ins); pmodeint(8, 0); if (abrt) @@ -324,7 +320,7 @@ opcodestart: } else if (nmi && nmi_enable) { - oldpc = cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcs = CS; // pclog("NMI\n"); x86_int(2); diff --git a/src/386_common.h b/src/386_common.h index 10dde89..6daf174 100644 --- a/src/386_common.h +++ b/src/386_common.h @@ -157,7 +157,7 @@ static inline uint8_t geteab() return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm&3].b.l; if (eal_r) return *(uint8_t *)eal_r; - return readmemb(easeg, eaaddr); + return readmemb(easeg, cpu_state.eaaddr); } static inline uint16_t geteaw() @@ -167,7 +167,7 @@ static inline uint16_t geteaw() // cycles-=3; if (eal_r) return *(uint16_t *)eal_r; - return readmemw(easeg, eaaddr); + return readmemw(easeg, cpu_state.eaaddr); } static inline uint32_t geteal() @@ -177,42 +177,42 @@ static inline uint32_t geteal() // cycles-=3; if (eal_r) return *eal_r; - return readmeml(easeg, eaaddr); + return readmeml(easeg, cpu_state.eaaddr); } static inline uint64_t geteaq() { - return readmemq(easeg, eaaddr); + return readmemq(easeg, cpu_state.eaaddr); } static inline uint8_t geteab_mem() { if (eal_r) return *(uint8_t *)eal_r; - return readmemb(easeg,eaaddr); + return readmemb(easeg,cpu_state.eaaddr); } static inline uint16_t geteaw_mem() { if (eal_r) return *(uint16_t *)eal_r; - return readmemw(easeg,eaaddr); + return readmemw(easeg,cpu_state.eaaddr); } static inline uint32_t geteal_mem() { if (eal_r) return *eal_r; - return readmeml(easeg,eaaddr); + return readmeml(easeg,cpu_state.eaaddr); } static inline void seteaq(uint64_t v) { - writememql(easeg, eaaddr, v); + writememql(easeg, cpu_state.eaaddr, v); } -#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v -#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,eaaddr,v); } else cpu_state.regs[cpu_rm].w=v -#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg,eaaddr,v); } else cpu_state.regs[cpu_rm].l=v +#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v +#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v +#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg,cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v -#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,eaaddr,v); -#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,eaaddr,v); -#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg,eaaddr,v); +#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,cpu_state.eaaddr,v); +#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v); +#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg,cpu_state.eaaddr,v); #define getbytef() ((uint8_t)(fetchdat)); cpu_state.pc++ #define getwordf() ((uint16_t)(fetchdat)); cpu_state.pc+=2 diff --git a/src/386_dynarec.c b/src/386_dynarec.c index f179097..c34d7f7 100644 --- a/src/386_dynarec.c +++ b/src/386_dynarec.c @@ -24,8 +24,6 @@ int cpu_recomp_blocks_latched, cpu_recomp_ins_latched, cpu_recomp_full_ins_latch int cpu_block_end = 0; -x86seg *ea_seg; - int nmi_enable = 1; int inscounts[256]; @@ -59,10 +57,6 @@ int inttype,abrt; uint32_t oldcs2; uint32_t oldecx; -uint32_t op32; - - - uint32_t *eal_r, *eal_w; @@ -72,8 +66,8 @@ uint32_t *mod1seg[8]; static inline void fetch_ea_32_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; if (cpu_rm == 4) { uint8_t sib = rmdat >> 8; @@ -81,60 +75,60 @@ static inline void fetch_ea_32_long(uint32_t rmdat) switch (cpu_mod) { case 0: - eaaddr = cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = cpu_state.regs[sib & 7].l; cpu_state.pc++; break; case 1: cpu_state.pc++; - eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = ((uint32_t)(int8_t)getbyte()) + cpu_state.regs[sib & 7].l; // cpu_state.pc++; break; case 2: - eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l; + cpu_state.eaaddr = (fastreadl(cs + cpu_state.pc + 1)) + cpu_state.regs[sib & 7].l; cpu_state.pc += 5; break; } /*SIB byte present*/ if ((sib & 7) == 5 && !cpu_mod) - eaaddr = getlong(); - else if ((sib & 6) == 4 && !ssegs) + cpu_state.eaaddr = getlong(); + else if ((sib & 6) == 4 && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } if (((sib >> 3) & 7) != 4) - eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); + cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); } else { - eaaddr = cpu_state.regs[cpu_rm].l; + cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; if (cpu_mod) { - if (cpu_rm == 5 && !ssegs) + if (cpu_rm == 5 && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } if (cpu_mod == 1) { - eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); + cpu_state.eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); cpu_state.pc++; } else { - eaaddr += getlong(); + cpu_state.eaaddr += getlong(); } } else if (cpu_rm == 5) { - eaaddr = getlong(); + cpu_state.eaaddr = getlong(); } } - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) @@ -145,38 +139,38 @@ static inline void fetch_ea_32_long(uint32_t rmdat) static inline void fetch_ea_16_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; if (!cpu_mod && cpu_rm == 6) { - eaaddr = getword(); + cpu_state.eaaddr = getword(); } else { switch (cpu_mod) { case 0: - eaaddr = 0; + cpu_state.eaaddr = 0; break; case 1: - eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++; + cpu_state.eaaddr = (uint16_t)(int8_t)(rmdat >> 8); cpu_state.pc++; break; case 2: - eaaddr = getword(); + cpu_state.eaaddr = getword(); break; } - eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); - if (mod1seg[cpu_rm] == &ss && !ssegs) + cpu_state.eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); + if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs) { easeg = ss; ea_rseg = SS; - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; } - eaaddr &= 0xFFFF; + cpu_state.eaaddr &= 0xFFFF; } - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) @@ -194,7 +188,7 @@ void x86_int(int num) uint32_t addr; // pclog("x86_int %02x %04x:%04x\n", num, CS,pc); flags_rebuild(); - cpu_state.pc=oldpc; + cpu_state.pc=cpu_state.oldpc; if (msw&1) { pmodeint(num,0); @@ -287,9 +281,9 @@ int rep386(int fv) uint32_t c;//=CX; uint8_t temp2; uint16_t tempw,tempw2,of; - uint32_t ipc=oldpc;//pc-1; + uint32_t ipc = cpu_state.oldpc;//pc-1; uint32_t oldds; - uint32_t rep32=op32; + uint32_t rep32 = cpu_state.op32; uint32_t templ,templ2; int tempz; int tempi; @@ -324,23 +318,23 @@ int rep386(int fv) cpu_state.pc=ipc+1; break; case 0x26: case 0x126: case 0x226: case 0x326: /*ES:*/ - ea_seg = &_es; + cpu_state.ea_seg = &_es; goto startrep; break; case 0x2E: case 0x12E: case 0x22E: case 0x32E: /*CS:*/ - ea_seg = &_cs; + cpu_state.ea_seg = &_cs; goto startrep; case 0x36: case 0x136: case 0x236: case 0x336: /*SS:*/ - ea_seg = &_ss; + cpu_state.ea_seg = &_ss; goto startrep; case 0x3E: case 0x13E: case 0x23E: case 0x33E: /*DS:*/ - ea_seg = &_ds; + cpu_state.ea_seg = &_ds; goto startrep; case 0x64: case 0x164: case 0x264: case 0x364: /*FS:*/ - ea_seg = &_fs; + cpu_state.ea_seg = &_fs; goto startrep; case 0x65: case 0x165: case 0x265: case 0x365: /*GS:*/ - ea_seg = &_gs; + cpu_state.ea_seg = &_gs; goto startrep; case 0x66: case 0x166: case 0x266: case 0x366: /*Data size prefix*/ rep32 = (rep32 & 0x200) | ((use32 ^ 0x100) & 0x100); @@ -445,7 +439,7 @@ int rep386(int fv) // cpu_notreps++; if (c>0) { - temp2 = readmemb(ea_seg->base, SI); + temp2 = readmemb(cpu_state.ea_seg->base, SI); if (abrt) break; checkio_perm(DX); outb(DX,temp2); @@ -461,7 +455,7 @@ int rep386(int fv) // cpu_notreps++; if (c>0) { - temp2 = readmemb(ea_seg->base, ESI); + temp2 = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) break; checkio_perm(DX); outb(DX,temp2); @@ -477,7 +471,7 @@ int rep386(int fv) // cpu_notreps++; if (c>0) { - tempw = readmemw(ea_seg->base, SI); + tempw = readmemw(cpu_state.ea_seg->base, SI); if (abrt) break; // pclog("OUTSW %04X -> %04X\n",SI,tempw); outw(DX,tempw); @@ -493,7 +487,7 @@ int rep386(int fv) // cpu_notreps++; if (c > 0) { - templ = readmeml(ea_seg->base, SI); + templ = readmeml(cpu_state.ea_seg->base, SI); if (abrt) break; outl(DX, templ); if (flags & D_FLAG) SI -= 4; @@ -508,7 +502,7 @@ int rep386(int fv) // cpu_notreps++; if (c>0) { - tempw = readmemw(ea_seg->base, ESI); + tempw = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) break; outw(DX,tempw); if (flags&D_FLAG) ESI-=2; @@ -523,7 +517,7 @@ int rep386(int fv) // cpu_notreps++; if (c > 0) { - templ = readmeml(ea_seg->base, ESI); + templ = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) break; outl(DX, templ); if (flags & D_FLAG) ESI -= 4; @@ -542,7 +536,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, DI, DI); - temp2 = readmemb(ea_seg->base, SI); if (abrt) break; + temp2 = readmemb(cpu_state.ea_seg->base, SI); if (abrt) break; writememb(es,DI,temp2); if (abrt) break; // if (output==3) pclog("MOVSB %08X:%04X -> %08X:%04X %02X\n",ds,SI,es,DI,temp2); if (flags&D_FLAG) { DI--; SI--; } @@ -561,7 +555,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, EDI, EDI); - temp2 = readmemb(ea_seg->base, ESI); if (abrt) break; + temp2 = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) break; writememb(es,EDI,temp2); if (abrt) break; if (flags&D_FLAG) { EDI--; ESI--; } else { EDI++; ESI++; } @@ -579,7 +573,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, DI, DI+1); - tempw = readmemw(ea_seg->base, SI); if (abrt) break; + tempw = readmemw(cpu_state.ea_seg->base, SI); if (abrt) break; writememw(es,DI,tempw); if (abrt) break; if (flags&D_FLAG) { DI-=2; SI-=2; } else { DI+=2; SI+=2; } @@ -597,7 +591,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, DI, DI+3); - templ = readmeml(ea_seg->base, SI); if (abrt) break; + templ = readmeml(cpu_state.ea_seg->base, SI); if (abrt) break; // pclog("MOVSD %08X from %08X to %08X (%04X:%08X)\n", templ, ds+SI, es+DI, CS, pc); writememl(es,DI,templ); if (abrt) break; if (flags&D_FLAG) { DI-=4; SI-=4; } @@ -616,7 +610,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, EDI, EDI+1); - tempw = readmemw(ea_seg->base, ESI); if (abrt) break; + tempw = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) break; writememw(es,EDI,tempw); if (abrt) break; // if (output) pclog("Written %04X from %08X to %08X %i %08X %04X %08X %04X\n",tempw,ds+ESI,es+EDI,c,ds,ES,es,ES); if (flags&D_FLAG) { EDI-=2; ESI-=2; } @@ -635,7 +629,7 @@ int rep386(int fv) while (c > 0) { CHECK_WRITE_REP(&_es, EDI, EDI+3); - templ = readmeml(ea_seg->base, ESI); if (abrt) break; + templ = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) break; // if ((EDI&0xFFFF0000)==0xA0000) cycles-=12; writememl(es,EDI,templ); if (abrt) break; // if (output) pclog("Load %08X from %08X to %08X %04X %08X %04X %08X\n",templ,ESI,EDI,DS,ds,ES,es); @@ -656,7 +650,7 @@ int rep386(int fv) tempz = (fv) ? 1 : 0; if ((c>0) && (fv==tempz)) { - temp = readmemb(ea_seg->base, SI); + temp = readmemb(cpu_state.ea_seg->base, SI); temp2=readmemb(es,DI); if (abrt) { flags=of; break; } if (flags&D_FLAG) { DI--; SI--; } @@ -674,7 +668,7 @@ int rep386(int fv) tempz = (fv) ? 1 : 0; if ((c>0) && (fv==tempz)) { - temp = readmemb(ea_seg->base, ESI); + temp = readmemb(cpu_state.ea_seg->base, ESI); temp2=readmemb(es,EDI); if (abrt) { flags=of; break; } if (flags&D_FLAG) { EDI--; ESI--; } @@ -693,7 +687,7 @@ int rep386(int fv) if ((c>0) && (fv==tempz)) { // pclog("CMPSW (%04x:%04x)%05X (%04x:%04x)%05X ", DS,SI, ds+SI, ES,DI, es+DI); - tempw = readmemw(ea_seg->base, SI); + tempw = readmemw(cpu_state.ea_seg->base, SI); tempw2=readmemw(es,DI); // pclog("%04X %04X %c%c %c%c\n", tempw, tempw2, tempw & 0xff, tempw >> 8, tempw2 & 0xff, tempw2 >> 8); @@ -713,7 +707,7 @@ int rep386(int fv) tempz = (fv) ? 1 : 0; if ((c>0) && (fv==tempz)) { - templ = readmeml(ea_seg->base, SI); + templ = readmeml(cpu_state.ea_seg->base, SI); templ2=readmeml(es,DI); if (abrt) { flags=of; break; } if (flags&D_FLAG) { DI-=4; SI-=4; } @@ -731,7 +725,7 @@ int rep386(int fv) tempz = (fv) ? 1 : 0; if ((c>0) && (fv==tempz)) { - tempw = readmemw(ea_seg->base, ESI); + tempw = readmemw(cpu_state.ea_seg->base, ESI); tempw2=readmemw(es,EDI); if (abrt) { flags=of; break; } if (flags&D_FLAG) { EDI-=2; ESI-=2; } @@ -749,7 +743,7 @@ int rep386(int fv) tempz = (fv) ? 1 : 0; if ((c>0) && (fv==tempz)) { - templ = readmeml(ea_seg->base, ESI); + templ = readmeml(cpu_state.ea_seg->base, ESI); templ2=readmeml(es,EDI); if (abrt) { flags=of; break; } if (flags&D_FLAG) { EDI-=4; ESI-=4; } @@ -876,7 +870,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSB %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - AL = readmemb(ea_seg->base, SI); + AL = readmemb(cpu_state.ea_seg->base, SI); if (abrt) break; if (flags&D_FLAG) SI--; else SI++; @@ -891,7 +885,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSB %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - AL = readmemb(ea_seg->base, ESI); + AL = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) break; if (flags&D_FLAG) ESI--; else ESI++; @@ -906,7 +900,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSW %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - AX = readmemw(ea_seg->base, SI); + AX = readmemw(cpu_state.ea_seg->base, SI); if (abrt) break; if (flags&D_FLAG) SI-=2; else SI+=2; @@ -921,7 +915,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSL %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - EAX = readmeml(ea_seg->base, SI); + EAX = readmeml(cpu_state.ea_seg->base, SI); if (abrt) break; if (flags&D_FLAG) SI-=4; else SI+=4; @@ -936,7 +930,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSW %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - AX = readmemw(ea_seg->base, ESI); + AX = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) break; if (flags&D_FLAG) ESI-=2; else ESI+=2; @@ -951,7 +945,7 @@ int rep386(int fv) // if (ds==0xFFFFFFFF) pclog("Null selector REP LODSL %04X(%06X):%06X\n",CS,cs,pc); if (c>0) { - EAX = readmeml(ea_seg->base, ESI); + EAX = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) break; if (flags&D_FLAG) ESI-=4; else ESI+=4; @@ -1227,9 +1221,9 @@ void exec386_dynarec(int cycs) while (cycles>0) { oldcs = CS; - oldpc = cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcpl = CPL; - op32 = use32; + cpu_state.op32 = use32; cycdiff=0; @@ -1242,12 +1236,12 @@ void exec386_dynarec(int cycs) while (!cpu_block_end) { oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcpl=CPL; - op32=use32; + cpu_state.op32 = use32; - ea_seg = &_ds; - ssegs = 0; + cpu_state.ea_seg = &_ds; + cpu_state.ssegs = 0; opcodestart: fetchdat = fastreadl(cs + cpu_state.pc); @@ -1263,7 +1257,7 @@ void exec386_dynarec(int cycs) // pclog("int %04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0x8f13f], ram[0x8f13e], ram[0x8f141], ram[0x8f140]); cpu_state.pc++; - x86_opcodes[(opcode | op32) & 0x3ff](fetchdat); + x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); } if (!use32) cpu_state.pc &= 0xffff; @@ -1391,12 +1385,12 @@ inrecomp=0; while (!cpu_block_end) { oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcpl=CPL; - op32=use32; + cpu_state.op32 = use32; - ea_seg = &_ds; - ssegs = 0; + cpu_state.ea_seg = &_ds; + cpu_state.ssegs = 0; opcodestart_compile: fetchdat = fastreadl(cs + cpu_state.pc); @@ -1415,9 +1409,9 @@ inrecomp=0; cpu_state.pc++; - codegen_generate_call(opcode, x86_opcodes[(opcode | op32) & 0x3ff], fetchdat, cpu_state.pc, cpu_state.pc-1); + codegen_generate_call(opcode, x86_opcodes[(opcode | cpu_state.op32) & 0x3ff], fetchdat, cpu_state.pc, cpu_state.pc-1); - x86_opcodes[(opcode | op32) & 0x3ff](fetchdat); + x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); if (x86_was_reset) break; @@ -1473,12 +1467,12 @@ inrecomp=0; while (!cpu_block_end) { oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; oldcpl=CPL; - op32=use32; + cpu_state.op32 = use32; - ea_seg = &_ds; - ssegs = 0; + cpu_state.ea_seg = &_ds; + cpu_state.ssegs = 0; codegen_endpc = (cs + cpu_state.pc) + 8; fetchdat = fastreadl(cs + cpu_state.pc); @@ -1494,7 +1488,7 @@ inrecomp=0; cpu_state.pc++; - x86_opcodes[(opcode | op32) & 0x3ff](fetchdat); + x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); if (x86_was_reset) break; @@ -1550,7 +1544,7 @@ inrecomp=0; { abrt = 0; CS = oldcs; - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; pclog("Double fault %i\n", ins); pmodeint(8, 0); if (abrt) diff --git a/src/386_dynarec_ops.c b/src/386_dynarec_ops.c index c2fd397..eba684e 100644 --- a/src/386_dynarec_ops.c +++ b/src/386_dynarec_ops.c @@ -18,11 +18,11 @@ extern uint32_t *mod1seg[8]; static inline void fetch_ea_32_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) @@ -33,11 +33,11 @@ static inline void fetch_ea_32_long(uint32_t rmdat) static inline void fetch_ea_16_long(uint32_t rmdat) { eal_r = eal_w = NULL; - easeg = ea_seg->base; - ea_rseg = ea_seg->seg; - if (easeg != 0xFFFFFFFF && ((easeg + eaaddr) & 0xFFF) <= 0xFFC) + easeg = cpu_state.ea_seg->base; + ea_rseg = cpu_state.ea_seg->seg; + if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) { - uint32_t addr = easeg + eaaddr; + uint32_t addr = easeg + cpu_state.eaaddr; if ( readlookup2[addr >> 12] != -1) eal_r = (uint32_t *)(readlookup2[addr >> 12] + addr); if (writelookup2[addr >> 12] != -1) diff --git a/src/386_ops.h b/src/386_ops.h index 9802d09..fe38e10 100644 --- a/src/386_ops.h +++ b/src/386_ops.h @@ -6,7 +6,7 @@ { \ if ((cond)) \ { \ - cpu_state.pc = oldpc; \ + cpu_state.pc = cpu_state.oldpc; \ x86illegal(); \ return 0; \ } \ @@ -142,7 +142,7 @@ static inline uint32_t POP_L_seg(uint32_t seg) static int ILLEGAL(uint32_t fetchdat) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; // fatal("Illegal instruction %08X\n", fetchdat); x86illegal(); diff --git a/src/808x.c b/src/808x.c index 9db555a..c9a5e4d 100644 --- a/src/808x.c +++ b/src/808x.c @@ -109,8 +109,6 @@ int shadowbios=0; int ins=0; //#define readmemb(a) (((a)<0xA0000)?ram[a]:readmembl(a)) -int ssegs; - int fetchcycles=0,memcycs,fetchclocks; uint8_t prefetchqueue[6]; @@ -341,7 +339,7 @@ reg = If mod=11, (depending on data size, 16 bits/8 bits, 32 bits=extend 16 bit */ int cycles=0; -uint32_t easeg,eaaddr; +uint32_t easeg; int rmdat; uint16_t zero=0; @@ -363,30 +361,30 @@ void makemod1table() static void fetcheal() { - if (!cpu_mod && cpu_rm==6) { eaaddr=getword(); easeg=ds; FETCHADD(6); } + if (!cpu_mod && cpu_rm==6) { cpu_state.eaaddr=getword(); easeg=ds; FETCHADD(6); } else { switch (cpu_mod) { case 0: - eaaddr=0; + cpu_state.eaaddr=0; if (cpu_rm&4) FETCHADD(5); else FETCHADD(7+slowrm[cpu_rm]); break; case 1: - eaaddr=(uint16_t)(int8_t)FETCH(); + cpu_state.eaaddr=(uint16_t)(int8_t)FETCH(); if (cpu_rm&4) FETCHADD(9); else FETCHADD(11+slowrm[cpu_rm]); break; case 2: - eaaddr=getword(); + cpu_state.eaaddr=getword(); if (cpu_rm&4) FETCHADD(9); else FETCHADD(11+slowrm[cpu_rm]); break; } - eaaddr+=(*mod1add[0][cpu_rm])+(*mod1add[1][cpu_rm]); + cpu_state.eaaddr+=(*mod1add[0][cpu_rm])+(*mod1add[1][cpu_rm]); easeg=*mod1seg[cpu_rm]; - eaaddr&=0xFFFF; + cpu_state.eaaddr&=0xFFFF; } } @@ -394,7 +392,7 @@ static inline uint8_t geteab() { if (cpu_mod == 3) return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm & 3].b.l; - return readmemb(easeg+eaaddr); + return readmemb(easeg+cpu_state.eaaddr); } static inline uint16_t geteaw() @@ -402,7 +400,7 @@ static inline uint16_t geteaw() if (cpu_mod == 3) return cpu_state.regs[cpu_rm].w; // if (output==3) printf("GETEAW %04X:%08X\n",easeg,eaaddr); - return readmemw(easeg,eaaddr); + return readmemw(easeg,cpu_state.eaaddr); } static inline uint16_t geteaw2() @@ -410,7 +408,7 @@ static inline uint16_t geteaw2() if (cpu_mod == 3) return cpu_state.regs[cpu_rm].w; // printf("Getting addr from %04X:%04X %05X\n",easeg,eaaddr+2,easeg+eaaddr+2); - return readmemw(easeg,(eaaddr+2)&0xFFFF); + return readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); } static inline void seteab(uint8_t val) @@ -424,7 +422,7 @@ static inline void seteab(uint8_t val) } else { - writememb(easeg+eaaddr,val); + writememb(easeg+cpu_state.eaaddr,val); } } @@ -434,7 +432,7 @@ static inline void seteaw(uint16_t val) cpu_state.regs[cpu_rm].w = val; else { - writememw(easeg,eaaddr,val); + writememw(easeg,cpu_state.eaaddr,val); // writememb(easeg+eaaddr+1,val>>8); } } @@ -586,7 +584,7 @@ chdir(pcempath); else printf("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",AX,BX,CX,DX,DI,SI,BP,SP); printf("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,flags); - printf("%04X:%04X %04X:%04X\n",oldcs,oldpc, oldcs2, oldpc2); + printf("%04X:%04X %04X:%04X\n",oldcs,cpu_state.oldpc, oldcs2, oldpc2); printf("%i ins\n",ins); if (is386) printf("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real"); @@ -824,7 +822,7 @@ void rep(int fv) int c=CX; uint8_t temp2; uint16_t tempw,tempw2; - uint16_t ipc=oldpc;//pc-1; + uint16_t ipc = cpu_state.oldpc;//pc-1; int changeds=0; uint32_t oldds; startrep: @@ -870,7 +868,7 @@ void rep(int fv) c--; cycles-=5; } - if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); } + if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } else firstrepcycle=1; break; case 0xA4: /*REP MOVSB*/ @@ -992,7 +990,7 @@ void rep(int fv) c--; cycles-=4; } - if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); } + if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } else firstrepcycle=1; break; case 0xAD: /*REP LODSW*/ @@ -1004,7 +1002,7 @@ void rep(int fv) c--; cycles-=4; } - if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); } + if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } else firstrepcycle=1; break; case 0xAE: /*REP SCASB*/ @@ -1022,7 +1020,7 @@ void rep(int fv) cycles -= 15; } //if (output) printf("%i %i %i %i\n",c,(c>0),(fv==((flags&Z_FLAG)?1:0)),((c>0) && (fv==((flags&Z_FLAG)?1:0)))); - if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); } + if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } else firstrepcycle=1; // cycles-=120; break; @@ -1038,7 +1036,7 @@ void rep(int fv) c--; cycles -= 15; } - if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); } + if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } else firstrepcycle=1; break; default: @@ -1095,7 +1093,7 @@ void execx86(int cycs) // if (output) printf("CLOCK %i %i\n",cycdiff,cycles); fetchclocks=0; oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; opcodestart: opcode=FETCH(); tempc=flags&C_FLAG; @@ -1170,13 +1168,13 @@ void execx86(int cycs) break; case 0x06: /*PUSH ES*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),ES); SP-=2; cycles-=14; break; case 0x07: /*POP ES*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=readmemw(ss,SP); loadseg(tempw,&_es); SP+=2; @@ -1233,13 +1231,13 @@ void execx86(int cycs) break; case 0x0E: /*PUSH CS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),CS); SP-=2; cycles-=14; break; case 0x0F: /*POP CS - 8088/8086 only*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=readmemw(ss,SP); loadseg(tempw,&_cs); SP+=2; @@ -1292,13 +1290,13 @@ void execx86(int cycs) break; case 0x16: /*PUSH SS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),SS); SP-=2; cycles-=14; break; case 0x17: /*POP SS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=readmemw(ss,SP); loadseg(tempw,&_ss); SP+=2; @@ -1357,16 +1355,16 @@ void execx86(int cycs) break; case 0x1E: /*PUSH DS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),DS); SP-=2; cycles-=14; break; case 0x1F: /*POP DS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=readmemw(ss,SP); loadseg(tempw,&_ds); - if (ssegs) oldds=ds; + if (cpu_state.ssegs) oldds=ds; SP+=2; cycles-=12; break; @@ -1424,7 +1422,7 @@ void execx86(int cycs) oldss=ss; oldds=ds; ds=ss=es; - ssegs=2; + cpu_state.ssegs=2; cycles-=4; goto opcodestart; // break; @@ -1500,7 +1498,7 @@ void execx86(int cycs) oldss=ss; oldds=ds; ds=ss=cs; - ssegs=2; + cpu_state.ssegs=2; cycles-=4; goto opcodestart; case 0x2F: /*DAS*/ @@ -1576,7 +1574,7 @@ void execx86(int cycs) oldss=ss; oldds=ds; ds=ss=ss; - ssegs=2; + cpu_state.ssegs=2; cycles-=4; goto opcodestart; // break; @@ -1637,7 +1635,7 @@ void execx86(int cycs) oldss=ss; oldds=ds; ds=ss=ds; - ssegs=2; + cpu_state.ssegs=2; cycles-=4; goto opcodestart; // break; @@ -1670,14 +1668,14 @@ void execx86(int cycs) case 0x50: case 0x51: case 0x52: case 0x53: /*PUSH r16*/ case 0x54: case 0x55: case 0x56: case 0x57: - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; SP-=2; writememw(ss,SP,cpu_state.regs[opcode&7].w); cycles-=15; break; case 0x58: case 0x59: case 0x5A: case 0x5B: /*POP r16*/ case 0x5C: case 0x5D: case 0x5E: case 0x5F: - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; SP+=2; cpu_state.regs[opcode&7].w=readmemw(ss,(SP-2)&0xFFFF); cycles-=12; @@ -2046,11 +2044,11 @@ void execx86(int cycs) seteaw(CS); break; case 0x18: /*DS*/ - if (ssegs) ds=oldds; + if (cpu_state.ssegs) ds=oldds; seteaw(DS); break; case 0x10: /*SS*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; seteaw(SS); break; } @@ -2059,7 +2057,7 @@ void execx86(int cycs) case 0x8D: /*LEA*/ fetchea(); - cpu_state.regs[cpu_reg].w=eaaddr; + cpu_state.regs[cpu_reg].w=cpu_state.eaaddr; cycles-=2; break; @@ -2080,12 +2078,12 @@ void execx86(int cycs) case 0x18: /*DS*/ tempw=geteaw(); loadseg(tempw,&_ds); - if (ssegs) oldds=ds; + if (cpu_state.ssegs) oldds=ds; break; case 0x10: /*SS*/ tempw=geteaw(); loadseg(tempw,&_ss); - if (ssegs) oldss=ss; + if (cpu_state.ssegs) oldss=ss; // printf("LOAD SS %04X %04X\n",tempw,SS); // printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4); break; @@ -2097,7 +2095,7 @@ void execx86(int cycs) case 0x8F: /*POPW*/ fetchea(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=readmemw(ss,SP); SP+=2; seteaw(tempw); @@ -2129,7 +2127,7 @@ void execx86(int cycs) tempw2=getword(); tempw3=CS; tempw4=cpu_state.pc; - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=tempw; // printf("0x9a"); loadcs(tempw2); @@ -2143,13 +2141,13 @@ void execx86(int cycs) cycles-=4; break; case 0x9C: /*PUSHF*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),flags|0xF000); SP-=2; cycles-=14; break; case 0x9D: /*POPF*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; flags=readmemw(ss,SP)&0xFFF; SP+=2; cycles-=12; @@ -2311,7 +2309,7 @@ void execx86(int cycs) case 0xC0: /*RET alias*/ case 0xC2: /*RET*/ tempw=getword(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=readmemw(ss,SP); // printf("C2\n"); // printf("RET to %04X\n",pc); @@ -2321,7 +2319,7 @@ void execx86(int cycs) break; case 0xC1: /*RET alias*/ case 0xC3: /*RET*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=readmemw(ss,SP); // printf("C3\n"); // if (output) printf("RET to %04X %05X\n",pc,ss+SP); @@ -2331,17 +2329,17 @@ void execx86(int cycs) break; case 0xC4: /*LES*/ fetchea(); - cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr); //geteaw(); - tempw=readmemw(easeg,(eaaddr+2)&0xFFFF); //geteaw2(); + cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); //geteaw(); + tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2(); loadseg(tempw,&_es); cycles-=24; break; case 0xC5: /*LDS*/ fetchea(); - cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr); - tempw=readmemw(easeg,(eaaddr+2)&0xFFFF); + cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); + tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); loadseg(tempw,&_ds); - if (ssegs) oldds=ds; + if (cpu_state.ssegs) oldds=ds; cycles-=24; break; case 0xC6: /*MOV b,#8*/ @@ -2360,7 +2358,7 @@ void execx86(int cycs) case 0xC8: /*RETF alias*/ case 0xCA: /*RETF*/ tempw=getword(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=readmemw(ss,SP); // printf("CA\n"); loadcs(readmemw(ss,SP+2)); @@ -2371,7 +2369,7 @@ void execx86(int cycs) break; case 0xC9: /*RETF alias*/ case 0xCB: /*RETF*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=readmemw(ss,SP); // printf("CB\n"); loadcs(readmemw(ss,SP+2)); @@ -2380,7 +2378,7 @@ void execx86(int cycs) FETCHCLEAR(); break; case 0xCC: /*INT 3*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),flags|0xF000); writememw(ss,((SP-4)&0xFFFF),CS); writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); @@ -2400,7 +2398,7 @@ void execx86(int cycs) lastcs=CS; temp=FETCH(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),flags|0xF000); writememw(ss,((SP-4)&0xFFFF),CS); writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); @@ -2415,7 +2413,7 @@ void execx86(int cycs) cycles-=71; break; case 0xCF: /*IRET*/ - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; tempw=CS; tempw2=cpu_state.pc; cpu_state.pc=readmemw(ss,SP); @@ -2941,7 +2939,7 @@ void execx86(int cycs) case 0xE8: /*CALL rel 16*/ tempw=getword(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; // writememb(ss+((SP-1)&0xFFFF),pc>>8); writememw(ss,((SP-2)&0xFFFF),cpu_state.pc); SP-=2; @@ -3343,7 +3341,7 @@ void execx86(int cycs) break; case 0x10: /*CALL*/ tempw=geteaw(); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,(SP-2)&0xFFFF,cpu_state.pc); SP-=2; cpu_state.pc=tempw; @@ -3352,11 +3350,11 @@ void execx86(int cycs) FETCHCLEAR(); break; case 0x18: /*CALL far*/ - tempw=readmemw(easeg,eaaddr); - tempw2=readmemw(easeg,(eaaddr+2)&0xFFFF); //geteaw2(); + tempw=readmemw(easeg,cpu_state.eaaddr); + tempw2=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2(); tempw3=CS; tempw4=cpu_state.pc; - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; cpu_state.pc=tempw; // printf("FF 18\n"); loadcs(tempw2); @@ -3373,9 +3371,9 @@ void execx86(int cycs) FETCHCLEAR(); break; case 0x28: /*JMP far*/ - cpu_state.pc=readmemw(easeg,eaaddr); //geteaw(); + cpu_state.pc=readmemw(easeg,cpu_state.eaaddr); //geteaw(); // printf("FF 28\n"); - loadcs(readmemw(easeg,(eaaddr+2)&0xFFFF)); //geteaw2(); + loadcs(readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF)); //geteaw2(); // cs=loadcs(CS); // cs=CS<<4; cycles-=24; @@ -3384,7 +3382,7 @@ void execx86(int cycs) case 0x30: /*PUSH w*/ tempw=geteaw(); // if (output) printf("PUSH %04X %i %02X %04X %04X %02X %02X\n",tempw,cpu_rm,rmdat,easeg,eaaddr,ram[0x22340+0x5638],ram[0x22340+0x5639]); - if (ssegs) ss=oldss; + if (cpu_state.ssegs) ss=oldss; writememw(ss,((SP-2)&0xFFFF),tempw); SP-=2; cycles-=((cpu_mod==3)?15:24); @@ -3420,11 +3418,11 @@ void execx86(int cycs) exit(-1); } output = 3;*/ - if (ssegs) + if (cpu_state.ssegs) { ds=oldds; ss=oldss; - ssegs=0; + cpu_state.ssegs=0; } // output = 3; @@ -3475,7 +3473,7 @@ void execx86(int cycs) FETCHCLEAR(); nmi_enable = 0; } - else if (takeint && !ssegs && !noint) + else if (takeint && !cpu_state.ssegs && !noint) { temp=picinterrupt(); if (temp!=0xFF) diff --git a/src/codegen_ops_arith.h b/src/codegen_ops_arith.h index 72763c4..ab9a8e0 100644 --- a/src/codegen_ops_arith.h +++ b/src/codegen_ops_arith.h @@ -152,7 +152,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_B(target_seg); \ src_reg = 0; \ } \ @@ -181,7 +181,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_W(target_seg); \ src_reg = 0; \ } \ @@ -210,7 +210,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_L(target_seg); \ src_reg = 0; \ } \ @@ -245,7 +245,7 @@ static uint32_t ropCMP_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_B(target_seg); src_reg = 0; } @@ -273,7 +273,7 @@ static uint32_t ropCMP_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_W(target_seg); src_reg = 0; } @@ -301,7 +301,7 @@ static uint32_t ropCMP_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_L(target_seg); src_reg = 0; } @@ -330,7 +330,7 @@ static uint32_t ropCMP_b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_B(target_seg); dst_reg = 0; } @@ -358,7 +358,7 @@ static uint32_t ropCMP_w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_W(target_seg); dst_reg = 0; } \ @@ -386,7 +386,7 @@ static uint32_t ropCMP_l_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_L(target_seg); dst_reg = 0; } diff --git a/src/codegen_ops_fpu.h b/src/codegen_ops_fpu.h index 2396855..ff50ff4 100644 --- a/src/codegen_ops_fpu.h +++ b/src/codegen_ops_fpu.h @@ -43,7 +43,7 @@ static uint32_t ropFLDs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -60,7 +60,7 @@ static uint32_t ropFLDd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_Q(target_seg); @@ -78,7 +78,7 @@ static uint32_t ropFILDw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_W(target_seg); @@ -95,7 +95,7 @@ static uint32_t ropFILDl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -112,7 +112,7 @@ static uint32_t ropFILDq(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_Q(target_seg); @@ -135,7 +135,7 @@ static uint32_t ropFSTs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 host_reg = FP_LOAD_REG(0); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); @@ -154,7 +154,7 @@ static uint32_t ropFSTd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 FP_LOAD_REG_D(0, &host_reg1, &host_reg2); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 7); @@ -190,7 +190,7 @@ static uint32_t ropF ## name ## size(uint8_t opcode, uint32_t fetchdat, uint32_t op_pc--; \ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ \ CHECK_SEG_READ(target_seg); \ load(target_seg); \ @@ -234,7 +234,7 @@ static uint32_t ropF ## name ## size(uint8_t opcode, uint32_t fetchdat, uint32_t op_pc--; \ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ \ CHECK_SEG_READ(target_seg); \ load(target_seg); \ @@ -265,7 +265,7 @@ ropFcompare(COM, il, MEM_LOAD_ADDR_EA_L, FP_COMPARE_IL); op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -282,7 +282,7 @@ static uint32_t ropFDIVs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -299,7 +299,7 @@ static uint32_t ropFMULs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -316,7 +316,7 @@ static uint32_t ropFSUBs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint op_pc--; target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); MEM_LOAD_ADDR_EA_L(target_seg); @@ -501,7 +501,7 @@ static uint32_t ropFISTw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint host_reg = FP_LOAD_REG_INT_W(0); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); @@ -520,7 +520,7 @@ static uint32_t ropFISTl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint host_reg = FP_LOAD_REG_INT(0); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); @@ -556,7 +556,7 @@ static uint32_t ropFISTPq(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin FP_LOAD_REG_INT_Q(0, &host_reg1, &host_reg2); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); diff --git a/src/codegen_ops_logic.h b/src/codegen_ops_logic.h index 73cd394..cb42c95 100644 --- a/src/codegen_ops_logic.h +++ b/src/codegen_ops_logic.h @@ -64,7 +64,7 @@ else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_B(target_seg); \ src_reg = 0; \ } \ @@ -90,7 +90,7 @@ else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_W(target_seg); \ src_reg = 0; \ } \ @@ -116,7 +116,7 @@ else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_L(target_seg); \ src_reg = 0; \ } \ @@ -147,7 +147,7 @@ static uint32_t ropTEST_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_B(target_seg); src_reg = 0; } @@ -172,7 +172,7 @@ static uint32_t ropTEST_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_W(target_seg); src_reg = 0; } @@ -197,7 +197,7 @@ static uint32_t ropTEST_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_L(target_seg); src_reg = 0; } @@ -370,7 +370,7 @@ static uint32_t ropF6(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_ { target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); imm = fastreadb(cs + op_pc + 1); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_B(target_seg); host_reg = 0; } @@ -421,7 +421,7 @@ static uint32_t ropF7_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 { target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); imm = fastreadw(cs + op_pc + 1); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_W(target_seg); host_reg = 0; } @@ -472,7 +472,7 @@ static uint32_t ropF7_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3 { target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); imm = fastreadl(cs + op_pc + 1); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_L(target_seg); host_reg = 0; } diff --git a/src/codegen_ops_misc.h b/src/codegen_ops_misc.h index 6104c9d..ffc14e7 100644 --- a/src/codegen_ops_misc.h +++ b/src/codegen_ops_misc.h @@ -29,7 +29,7 @@ static uint32_t ropFF_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_W(target_seg); host_reg = 0; } @@ -40,7 +40,7 @@ static uint32_t ropFF_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint STORE_HOST_REG_ADDR_W((uintptr_t)&codegen_temp, host_reg); RELEASE_REG(host_reg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); host_reg = LOAD_REG_IMM(op_pc + 1); MEM_STORE_ADDR_EA_W(&_ss, host_reg); @@ -57,7 +57,7 @@ static uint32_t ropFF_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint case 0x30: /*PUSH*/ if (!host_reg) host_reg = LOAD_HOST_REG(host_reg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); MEM_STORE_ADDR_EA_W(&_ss, host_reg); SP_MODIFY(-2); @@ -78,7 +78,7 @@ static uint32_t ropFF_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint else { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_EA_L(target_seg); host_reg = 0; } @@ -89,7 +89,7 @@ static uint32_t ropFF_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint STORE_HOST_REG_ADDR((uintptr_t)&codegen_temp, host_reg); RELEASE_REG(host_reg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); host_reg = LOAD_REG_IMM(op_pc + 1); MEM_STORE_ADDR_EA_L(&_ss, host_reg); @@ -106,7 +106,7 @@ static uint32_t ropFF_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint case 0x30: /*PUSH*/ if (!host_reg) host_reg = LOAD_HOST_REG(host_reg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); MEM_STORE_ADDR_EA_L(&_ss, host_reg); SP_MODIFY(-4); diff --git a/src/codegen_ops_mmx.h b/src/codegen_ops_mmx.h index dfb694d..78239cb 100644 --- a/src/codegen_ops_mmx.h +++ b/src/codegen_ops_mmx.h @@ -14,7 +14,7 @@ static uint32_t ropMOVQ_q_mm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 7); @@ -40,7 +40,7 @@ static uint32_t ropMOVQ_mm_q(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -67,7 +67,7 @@ static uint32_t ropMOVD_l_mm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 3); @@ -90,7 +90,7 @@ static uint32_t ropMOVD_mm_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -117,7 +117,7 @@ static uint32_t name(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ \ CHECK_SEG_READ(target_seg); \ \ diff --git a/src/codegen_ops_mov.h b/src/codegen_ops_mov.h index 32ccfa6..3f9600b 100644 --- a/src/codegen_ops_mov.h +++ b/src/codegen_ops_mov.h @@ -32,7 +32,7 @@ static uint32_t ropMOV_b_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 0); @@ -55,7 +55,7 @@ static uint32_t ropMOV_w_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 1); @@ -81,7 +81,7 @@ static uint32_t ropMOV_l_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); CHECK_SEG_LIMITS(target_seg, 3); @@ -105,7 +105,7 @@ static uint32_t ropMOV_r_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -126,7 +126,7 @@ static uint32_t ropMOV_r_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -147,7 +147,7 @@ static uint32_t ropMOV_r_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -170,7 +170,7 @@ static uint32_t ropMOV_b_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t imm = fastreadb(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); MEM_STORE_ADDR_EA_B(target_seg, host_reg); @@ -191,7 +191,7 @@ static uint32_t ropMOV_w_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t imm = fastreadw(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); MEM_STORE_ADDR_EA_W(target_seg, host_reg); @@ -214,7 +214,7 @@ static uint32_t ropMOV_l_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t imm = fastreadl(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); MEM_STORE_ADDR_EA_L(target_seg, host_reg); @@ -235,7 +235,7 @@ static uint32_t ropMOV_AL_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u addr = fastreadw(cs + op_pc); CHECK_SEG_READ(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_IMM_B(op_ea_seg, addr); STORE_REG_TARGET_B_RELEASE(0, REG_AL); @@ -252,7 +252,7 @@ static uint32_t ropMOV_AX_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u addr = fastreadw(cs + op_pc); CHECK_SEG_READ(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_IMM_W(op_ea_seg, addr); STORE_REG_TARGET_W_RELEASE(0, REG_AX); @@ -269,7 +269,7 @@ static uint32_t ropMOV_EAX_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, addr = fastreadw(cs + op_pc); CHECK_SEG_READ(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); MEM_LOAD_ADDR_IMM_L(op_ea_seg, addr); STORE_REG_TARGET_L_RELEASE(0, REG_EAX); @@ -288,7 +288,7 @@ static uint32_t ropMOV_a_AL(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u addr = fastreadw(cs + op_pc); CHECK_SEG_WRITE(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); host_reg = LOAD_REG_B(REG_AL); @@ -308,7 +308,7 @@ static uint32_t ropMOV_a_AX(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u addr = fastreadw(cs + op_pc); CHECK_SEG_WRITE(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); host_reg = LOAD_REG_W(REG_AX); @@ -328,7 +328,7 @@ static uint32_t ropMOV_a_EAX(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, addr = fastreadw(cs + op_pc); CHECK_SEG_WRITE(op_ea_seg); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); host_reg = LOAD_REG_L(REG_EAX); @@ -377,7 +377,7 @@ static uint32_t ropMOVZX_w_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -400,7 +400,7 @@ static uint32_t ropMOVZX_l_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -423,7 +423,7 @@ static uint32_t ropMOVZX_l_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -447,7 +447,7 @@ static uint32_t ropMOVSX_w_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -470,7 +470,7 @@ static uint32_t ropMOVSX_l_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); @@ -493,7 +493,7 @@ static uint32_t ropMOVSX_l_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); CHECK_SEG_READ(target_seg); diff --git a/src/codegen_ops_stack.h b/src/codegen_ops_stack.h index 349597d..7e98baa 100644 --- a/src/codegen_ops_stack.h +++ b/src/codegen_ops_stack.h @@ -2,7 +2,7 @@ static uint32_t ropPUSH_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); host_reg = LOAD_REG_W(opcode & 7); MEM_STORE_ADDR_EA_W(&_ss, host_reg); @@ -14,7 +14,7 @@ static uint32_t ropPUSH_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, ui { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); host_reg = LOAD_REG_L(opcode & 7); MEM_STORE_ADDR_EA_L(&_ss, host_reg); @@ -28,7 +28,7 @@ static uint32_t ropPUSH_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32 uint16_t imm = fetchdat & 0xffff; int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); host_reg = LOAD_REG_IMM(imm); MEM_STORE_ADDR_EA_W(&_ss, host_reg); @@ -41,7 +41,7 @@ static uint32_t ropPUSH_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32 uint32_t imm = fastreadl(cs + op_pc); int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); host_reg = LOAD_REG_IMM(imm); MEM_STORE_ADDR_EA_L(&_ss, host_reg); @@ -58,7 +58,7 @@ static uint32_t ropPUSH_imm_b16(uint8_t opcode, uint32_t fetchdat, uint32_t op_3 if (imm & 0x80) imm |= 0xff00; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); host_reg = LOAD_REG_IMM(imm); MEM_STORE_ADDR_EA_W(&_ss, host_reg); @@ -74,7 +74,7 @@ static uint32_t ropPUSH_imm_b32(uint8_t opcode, uint32_t fetchdat, uint32_t op_3 if (imm & 0x80) imm |= 0xffffff00; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); host_reg = LOAD_REG_IMM(imm); MEM_STORE_ADDR_EA_L(&_ss, host_reg); @@ -87,7 +87,7 @@ static uint32_t ropPOP_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_W(&_ss); SP_MODIFY(2); @@ -99,7 +99,7 @@ static uint32_t ropPOP_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_L(&_ss); SP_MODIFY(4); @@ -112,7 +112,7 @@ static uint32_t ropRET_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_W(&_ss); STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0); @@ -124,7 +124,7 @@ static uint32_t ropRET_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_L(&_ss); STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0); @@ -138,7 +138,7 @@ static uint32_t ropRET_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint16_t offset = fetchdat & 0xffff; int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_W(&_ss); STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0); @@ -151,7 +151,7 @@ static uint32_t ropRET_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint16_t offset = fetchdat & 0xffff; int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(0); MEM_LOAD_ADDR_EA_L(&_ss); STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0); @@ -165,7 +165,7 @@ static uint32_t ropCALL_r16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u uint16_t offset = fetchdat & 0xffff; int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-2); host_reg = LOAD_REG_IMM(op_pc+2); MEM_STORE_ADDR_EA_W(&_ss, host_reg); @@ -179,7 +179,7 @@ static uint32_t ropCALL_r32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u uint32_t offset = fastreadl(cs + op_pc); int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_STACK_TO_EA(-4); host_reg = LOAD_REG_IMM(op_pc+4); MEM_STORE_ADDR_EA_L(&_ss, host_reg); @@ -193,7 +193,7 @@ static uint32_t ropLEAVE_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_EBP_TO_EA(0); MEM_LOAD_ADDR_EA_W(&_ss); host_reg = LOAD_REG_W(REG_BP); /*SP = BP + 2*/ @@ -207,7 +207,7 @@ static uint32_t ropLEAVE_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, u { int host_reg; - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); LOAD_EBP_TO_EA(0); MEM_LOAD_ADDR_EA_L(&_ss); host_reg = LOAD_REG_L(REG_EBP); /*ESP = EBP + 4*/ @@ -223,7 +223,7 @@ static uint32_t ropPUSH_ ## seg ## _16(uint8_t opcode, uint32_t fetchdat, uint32 { \ int host_reg; \ \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ LOAD_STACK_TO_EA(-2); \ host_reg = LOAD_VAR_W((uintptr_t)&seg); \ MEM_STORE_ADDR_EA_W(&_ss, host_reg); \ @@ -235,7 +235,7 @@ static uint32_t ropPUSH_ ## seg ## _32(uint8_t opcode, uint32_t fetchdat, uint32 { \ int host_reg; \ \ - STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ + STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \ LOAD_STACK_TO_EA(-4); \ host_reg = LOAD_VAR_W((uintptr_t)&seg); \ MEM_STORE_ADDR_EA_L(&_ss, host_reg); \ diff --git a/src/codegen_ops_x86-64.h b/src/codegen_ops_x86-64.h index 58b5c0f..eed5408 100644 --- a/src/codegen_ops_x86-64.h +++ b/src/codegen_ops_x86-64.h @@ -498,7 +498,14 @@ static void STORE_IMM_REG_L(int reg, uint32_t val) static void STORE_IMM_ADDR_L(uintptr_t addr, uint32_t val) { - if (addr < 0x100000000) + if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x80) + { + addbyte(0xC7); /*MOVL [addr],val*/ + addbyte(0x45); + addbyte(addr - (uintptr_t)&cpu_state); + addlong(val); + } + else if (addr < 0x100000000) { addbyte(0xC7); /*MOVL [addr],val*/ addbyte(0x04); @@ -3338,11 +3345,10 @@ static void FP_ENTER() addlong((uintptr_t)&cr0); addbyte(0xc); addbyte(0x74); /*JZ +*/ - addbyte(11+5+12+5); + addbyte(7+5+12+5); addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/ - addbyte(0x04); - addbyte(0x25); - addlong((uintptr_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(op_old_pc); load_param_1_32(&codeblock[block_current], 7); CALL_FUNC(x86_int); @@ -4400,11 +4406,10 @@ static void MMX_ENTER() addlong((uintptr_t)&cr0); addbyte(0xc); addbyte(0x74); /*JZ +*/ - addbyte(11+5+12+5); + addbyte(7+5+12+5); addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/ - addbyte(0x04); - addbyte(0x25); - addlong((uintptr_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(op_old_pc); load_param_1_32(&codeblock[block_current], 7); CALL_FUNC(x86_int); diff --git a/src/codegen_ops_x86.h b/src/codegen_ops_x86.h index 7393c29..9808190 100644 --- a/src/codegen_ops_x86.h +++ b/src/codegen_ops_x86.h @@ -1321,7 +1321,7 @@ static x86seg *FETCH_EA_32(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, u addbyte(0x8b); /*MOVL EAX, regs[rm].l*/ addbyte(0x45); addbyte((uint32_t)&cpu_state.regs[rm].l - (uint32_t)&EAX); - eaaddr = cpu_state.regs[rm].l; + cpu_state.eaaddr = cpu_state.regs[rm].l; if (mod) { if (rm == 5 && !op_ssegs) @@ -1819,10 +1819,10 @@ static void FP_ENTER() addlong((uintptr_t)&cr0); addbyte(0xc); addbyte(0x74); /*JZ +*/ - addbyte(10+7+5+5); + addbyte(7+7+5+5); addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/ - addbyte(0x05); - addlong((uintptr_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(op_old_pc); addbyte(0xc7); /*MOV [ESP], 7*/ addbyte(0x04); @@ -3063,10 +3063,10 @@ static void MMX_ENTER() addlong((uintptr_t)&cr0); addbyte(0xc); addbyte(0x74); /*JZ +*/ - addbyte(10+7+5+5); + addbyte(7+7+5+5); addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/ - addbyte(0x05); - addlong((uintptr_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(op_old_pc); addbyte(0xc7); /*MOV [ESP], 7*/ addbyte(0x04); diff --git a/src/codegen_x86-64.c b/src/codegen_x86-64.c index 8bc3a8c..d2247e2 100644 --- a/src/codegen_x86-64.c +++ b/src/codegen_x86-64.c @@ -611,9 +611,8 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, if (!cpu_mod && cpu_rm == 6) { addbyte(0xC7); /*MOVL $0,(ssegs)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); addlong((fetchdat >> 8) & 0xffff); (*op_pc) += 2; } @@ -722,9 +721,8 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, addlong(0xffff); } addbyte(0x89); /*MOV eaaddr, EAX*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); if (mod1seg[cpu_rm] == &ss && !op_ssegs) op_ea_seg = &_ss; @@ -878,9 +876,8 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, op_ea_seg = &_ss; addbyte(0x89); /*MOV eaaddr, EAX*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); } else { @@ -890,9 +887,8 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, { new_eaaddr = fastreadl(cs + (*op_pc) + 1); addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); addlong(new_eaaddr); (*op_pc) += 4; return op_ea_seg; @@ -922,17 +918,15 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, (*op_pc) += 4; } addbyte(0x89); /*MOV eaaddr, EAX*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); } else { addbyte(0x44); /*MOV eaaddr, base_reg*/ addbyte(0x89); - addbyte(4 | (base_reg << 3)); - addbyte(0x25); - addlong((uint32_t)&eaaddr); + addbyte(0x45 | (base_reg << 3)); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); } } return op_ea_seg; @@ -1151,11 +1145,10 @@ generate_call: if (op_ssegs != last_ssegs) { last_ssegs = op_ssegs; - addbyte(0xC7); /*MOVL $0,(ssegs)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&ssegs); - addlong(op_ssegs); + addbyte(0xC6); /*MOVB $0,(ssegs)*/ + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.ssegs - (uintptr_t)&cpu_state); + addbyte(op_ssegs); } //#if 0 if ((!test_modrm || @@ -1184,15 +1177,14 @@ generate_call: op_pc -= pc_off; } //#endif -// if (op_ea_seg != last_ea_seg) -// { + if (op_ea_seg != last_ea_seg) + { // last_ea_seg = op_ea_seg; addbyte(0xC7); /*MOVL $&_ds,(ea_seg)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&ea_seg); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.ea_seg - (uintptr_t)&cpu_state); addlong((uint32_t)op_ea_seg); -// } + } addbyte(0xC7); /*MOVL [pc],new_pc*/ @@ -1200,17 +1192,15 @@ generate_call: addbyte((uintptr_t)&cpu_state.pc - (uintptr_t)&cpu_state); addlong(op_pc + pc_off); addbyte(0xC7); /*MOVL $old_pc,(oldpc)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(old_pc); if (op_32 != last_op32) { last_op32 = op_32; addbyte(0xC7); /*MOVL $use32,(op32)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&op32); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.op32 - (uintptr_t)&cpu_state); addlong(op_32); } diff --git a/src/codegen_x86.c b/src/codegen_x86.c index 8f4956c..6a69fee 100644 --- a/src/codegen_x86.c +++ b/src/codegen_x86.c @@ -572,8 +572,8 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, if (!cpu_mod && cpu_rm == 6) { addbyte(0xC7); /*MOVL $0,(ssegs)*/ - addbyte(0x05); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); addlong((fetchdat >> 8) & 0xffff); (*op_pc) += 2; } @@ -614,7 +614,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, addbyte(0x25); /*ANDL $0xffff, %eax*/ addlong(0xffff); addbyte(0xa3); - addlong((uint32_t)&eaaddr); + addlong((uint32_t)&cpu_state.eaaddr); if (mod1seg[cpu_rm] == &ss && !op_ssegs) op_ea_seg = &_ss; @@ -701,7 +701,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, } } addbyte(0xa3); - addlong((uint32_t)&eaaddr); + addlong((uint32_t)&cpu_state.eaaddr); } else { @@ -709,8 +709,8 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, { new_eaaddr = fastreadl(cs + (*op_pc) + 1); addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/ - addbyte(0x05); - addlong((uint32_t)&eaaddr); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.eaaddr - (uintptr_t)&cpu_state); addlong(new_eaaddr); (*op_pc) += 4; return op_ea_seg; @@ -720,7 +720,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, addbyte((uintptr_t)&cpu_state.regs[cpu_rm].l - (uintptr_t)&cpu_state); // addbyte(0xa1); /*MOVL regs[cpu_rm].l, %eax*/ // addlong((uint32_t)&cpu_state.regs[cpu_rm].l); - eaaddr = cpu_state.regs[cpu_rm].l; + cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; if (cpu_mod) { if (cpu_rm == 5 && !op_ssegs) @@ -740,7 +740,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, } } addbyte(0xa3); - addlong((uint32_t)&eaaddr); + addlong((uint32_t)&cpu_state.eaaddr); } return op_ea_seg; } @@ -958,10 +958,11 @@ generate_call: if (op_ssegs != last_ssegs) { last_ssegs = op_ssegs; - addbyte(0xC7); /*MOVL $0,(ssegs)*/ - addbyte(0x05); - addlong((uint32_t)&ssegs); - addlong(op_ssegs); + + addbyte(0xC6); /*MOVB [ssegs],op_ssegs*/ + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.ssegs - (uintptr_t)&cpu_state); + addbyte(op_pc + pc_off); } if (!test_modrm || @@ -990,14 +991,14 @@ generate_call: op_pc -= pc_off; } -// if (op_ea_seg != last_ea_seg) -// { -// last_ea_seg = op_ea_seg; + if (op_ea_seg != last_ea_seg) + { + last_ea_seg = op_ea_seg; addbyte(0xC7); /*MOVL $&_ds,(ea_seg)*/ - addbyte(0x05); - addlong((uint32_t)&ea_seg); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.ea_seg - (uintptr_t)&cpu_state); addlong((uint32_t)op_ea_seg); -// } + } addbyte(0xC7); /*MOVL pc,new_pc*/ addbyte(0x45); @@ -1005,15 +1006,16 @@ generate_call: addlong(op_pc + pc_off); addbyte(0xC7); /*MOVL $old_pc,(oldpc)*/ - addbyte(0x05); - addlong((uint32_t)&oldpc); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state); addlong(old_pc); + if (op_32 != last_op32) { last_op32 = op_32; addbyte(0xC7); /*MOVL $use32,(op32)*/ - addbyte(0x05); - addlong((uint32_t)&op32); + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.op32 - (uintptr_t)&cpu_state); addlong(op_32); } diff --git a/src/ibm.h b/src/ibm.h index 1cc5a17..adece92 100644 --- a/src/ibm.h +++ b/src/ibm.h @@ -99,35 +99,6 @@ typedef union } b; } x86reg; -struct -{ - x86reg regs[8]; - - int flags_op; - uint32_t flags_res; - uint32_t flags_op1, flags_op2; - - uint32_t pc; - - union - { - struct - { - int8_t rm, mod, reg; - } rm_mod_reg; - uint32_t rm_mod_reg_data; - } rm_data; -} cpu_state; - -/*x86reg regs[8];*/ - -uint16_t flags,eflags; -uint32_t /*cs,ds,es,ss,*/oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw; -//uint16_t msw; - -extern int ins,output; -extern int cycdiff; - typedef struct { uint32_t base; @@ -138,12 +109,50 @@ typedef struct int checked; /*Non-zero if selector is known to be valid*/ } x86seg; +struct +{ + x86reg regs[8]; + + x86seg *ea_seg; + uint32_t eaaddr; + + int flags_op; + uint32_t flags_res; + uint32_t flags_op1, flags_op2; + + uint32_t pc; + uint32_t oldpc; + uint32_t op32; + + union + { + struct + { + int8_t rm, mod, reg; + } rm_mod_reg; + uint32_t rm_mod_reg_data; + } rm_data; + + int8_t ssegs; +} cpu_state; + +#define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0]; + +COMPILE_TIME_ASSERT(sizeof(cpu_state) <= 128); + +/*x86reg regs[8];*/ + +uint16_t flags,eflags; +uint32_t /*cs,ds,es,ss,*/oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw; +//uint16_t msw; + +extern int ins,output; +extern int cycdiff; + x86seg gdt,ldt,idt,tr; x86seg _cs,_ds,_es,_ss,_fs,_gs; x86seg _oldds; -extern x86seg *ea_seg; - uint32_t pccache; uint8_t *pccache2; /*Segments - diff --git a/src/x86.h b/src/x86.h index 34379bc..5afba32 100644 --- a/src/x86.h +++ b/src/x86.h @@ -1,5 +1,4 @@ uint16_t oldcs; -uint32_t oldpc; extern uint32_t rmdat32; int oldcpl; @@ -7,10 +6,9 @@ extern int nmi_enable; int tempc; int cycles,output; -int ssegs; int firstrepcycle; -uint32_t easeg,eaaddr,ealimit,ealimitw; +uint32_t easeg,ealimit,ealimitw; int skipnextprint; int inhlt; diff --git a/src/x86_ops_atomic.h b/src/x86_ops_atomic.h index 67ad1e5..d25991e 100644 --- a/src/x86_ops_atomic.h +++ b/src/x86_ops_atomic.h @@ -3,7 +3,7 @@ static int opCMPXCHG_b_a16(uint32_t fetchdat) uint8_t temp, temp2 = AL; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -21,7 +21,7 @@ static int opCMPXCHG_b_a32(uint32_t fetchdat) uint8_t temp, temp2 = AL; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -40,7 +40,7 @@ static int opCMPXCHG_w_a16(uint32_t fetchdat) uint16_t temp, temp2 = AX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -58,7 +58,7 @@ static int opCMPXCHG_w_a32(uint32_t fetchdat) uint16_t temp, temp2 = AX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -77,7 +77,7 @@ static int opCMPXCHG_l_a16(uint32_t fetchdat) uint32_t temp, temp2 = EAX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -95,7 +95,7 @@ static int opCMPXCHG_l_a32(uint32_t fetchdat) uint32_t temp, temp2 = EAX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -114,17 +114,17 @@ static int opCMPXCHG8B_a16(uint32_t fetchdat) uint32_t temp, temp_hi, temp2 = EAX, temp2_hi = EDX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 0; } fetch_ea_16(fetchdat); temp = geteal(); - temp_hi = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + temp_hi = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; if (EAX == temp && EDX == temp_hi) { seteal(EBX); - writememl(easeg, eaaddr+4, ECX); + writememl(easeg, cpu_state.eaaddr+4, ECX); } else { @@ -145,17 +145,17 @@ static int opCMPXCHG8B_a32(uint32_t fetchdat) uint32_t temp, temp_hi, temp2 = EAX, temp2_hi = EDX; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 0; } fetch_ea_32(fetchdat); temp = geteal(); - temp_hi = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + temp_hi = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; if (EAX == temp && EDX == temp_hi) { seteal(EBX); - writememl(easeg, eaaddr+4, ECX); + writememl(easeg, cpu_state.eaaddr+4, ECX); } else { @@ -177,7 +177,7 @@ static int opXADD_b_a16(uint32_t fetchdat) uint8_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -194,7 +194,7 @@ static int opXADD_b_a32(uint32_t fetchdat) uint8_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -212,7 +212,7 @@ static int opXADD_w_a16(uint32_t fetchdat) uint16_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -229,7 +229,7 @@ static int opXADD_w_a32(uint32_t fetchdat) uint16_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -247,7 +247,7 @@ static int opXADD_l_a16(uint32_t fetchdat) uint32_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -264,7 +264,7 @@ static int opXADD_l_a32(uint32_t fetchdat) uint32_t temp; if (!is486) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } diff --git a/src/x86_ops_bit.h b/src/x86_ops_bit.h index 78c118d..f299df1 100644 --- a/src/x86_ops_bit.h +++ b/src/x86_ops_bit.h @@ -4,7 +4,7 @@ static int opBT_w_r_a16(uint32_t fetchdat) uint16_t temp; fetch_ea_16(fetchdat); - eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; temp = geteaw(); if (abrt) return 1; flags_rebuild(); if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; @@ -18,7 +18,7 @@ static int opBT_w_r_a32(uint32_t fetchdat) uint16_t temp; fetch_ea_32(fetchdat); - eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; temp = geteaw(); if (abrt) return 1; flags_rebuild(); if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; @@ -32,7 +32,7 @@ static int opBT_l_r_a16(uint32_t fetchdat) uint32_t temp; fetch_ea_16(fetchdat); - eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; temp = geteal(); if (abrt) return 1; flags_rebuild(); if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; @@ -46,7 +46,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; fetch_ea_32(fetchdat); - eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; temp = geteal(); if (abrt) return 1; flags_rebuild(); if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; @@ -63,7 +63,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint16_t temp; \ \ fetch_ea_16(fetchdat); \ - eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ temp = geteaw(); if (abrt) return 1; \ tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \ temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \ @@ -81,7 +81,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint16_t temp; \ \ fetch_ea_32(fetchdat); \ - eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ temp = geteaw(); if (abrt) return 1; \ tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \ temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \ @@ -99,7 +99,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; \ \ fetch_ea_16(fetchdat); \ - eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ temp = geteal(); if (abrt) return 1; \ tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \ temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \ @@ -117,7 +117,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; \ \ fetch_ea_32(fetchdat); \ - eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ + cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ temp = geteal(); if (abrt) return 1; \ tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \ temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \ @@ -164,7 +164,7 @@ static int opBA_w_a16(uint32_t fetchdat) default: pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -204,7 +204,7 @@ static int opBA_w_a32(uint32_t fetchdat) default: pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -245,7 +245,7 @@ static int opBA_l_a16(uint32_t fetchdat) default: pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -285,7 +285,7 @@ static int opBA_l_a32(uint32_t fetchdat) default: pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } diff --git a/src/x86_ops_call.h b/src/x86_ops_call.h index 2446d16..ca47b55 100644 --- a/src/x86_ops_call.h +++ b/src/x86_ops_call.h @@ -117,8 +117,8 @@ static int opFF_w_a16(uint32_t fetchdat) else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ - new_pc = readmemw(easeg, eaaddr); - new_cs = readmemw(easeg, (eaaddr + 2)); if (abrt) return 1; + new_pc = readmemw(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (abrt) return 1; CALL_FAR_w(new_cs, new_pc); CPU_BLOCK_END(); @@ -132,8 +132,8 @@ static int opFF_w_a16(uint32_t fetchdat) break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; - new_pc = readmemw(easeg, eaaddr); - new_cs = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + new_pc = readmemw(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; cpu_state.pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); @@ -182,8 +182,8 @@ static int opFF_w_a32(uint32_t fetchdat) else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ - new_pc = readmemw(easeg, eaaddr); - new_cs = readmemw(easeg, (eaaddr + 2)); if (abrt) return 1; + new_pc = readmemw(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (abrt) return 1; CALL_FAR_w(new_cs, new_pc); CPU_BLOCK_END(); @@ -197,8 +197,8 @@ static int opFF_w_a32(uint32_t fetchdat) break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; - new_pc = readmemw(easeg, eaaddr); - new_cs = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + new_pc = readmemw(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; cpu_state.pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); @@ -248,8 +248,8 @@ static int opFF_l_a16(uint32_t fetchdat) else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ - new_pc = readmeml(easeg, eaaddr); - new_cs = readmemw(easeg, (eaaddr + 4)); if (abrt) return 1; + new_pc = readmeml(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (abrt) return 1; CALL_FAR_l(new_cs, new_pc); CPU_BLOCK_END(); @@ -263,8 +263,8 @@ static int opFF_l_a16(uint32_t fetchdat) break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; - new_pc = readmeml(easeg, eaaddr); - new_cs = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + new_pc = readmeml(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; cpu_state.pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); @@ -313,8 +313,8 @@ static int opFF_l_a32(uint32_t fetchdat) else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ - new_pc = readmeml(easeg, eaaddr); - new_cs = readmemw(easeg, (eaaddr + 4)); if (abrt) return 1; + new_pc = readmeml(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (abrt) return 1; CALL_FAR_l(new_cs, new_pc); CPU_BLOCK_END(); @@ -328,8 +328,8 @@ static int opFF_l_a32(uint32_t fetchdat) break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; - new_pc = readmeml(easeg, eaaddr); - new_cs = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + new_pc = readmeml(easeg, cpu_state.eaaddr); + new_cs = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; cpu_state.pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); diff --git a/src/x86_ops_int.h b/src/x86_ops_int.h index a392431..2e1f508 100644 --- a/src/x86_ops_int.h +++ b/src/x86_ops_int.h @@ -67,7 +67,7 @@ static int opINTO(uint32_t fetchdat) } if (VF_SET()) { - oldpc = cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; x86_int_sw(4); return 1; } diff --git a/src/x86_ops_misc.h b/src/x86_ops_misc.h index 593784c..c2fa022 100644 --- a/src/x86_ops_misc.h +++ b/src/x86_ops_misc.h @@ -548,7 +548,7 @@ static int opLOCK(uint32_t fetchdat) cpu_state.pc++; CLOCK_CYCLES(4); - return x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); } @@ -560,7 +560,7 @@ static int opBOUND_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); low = geteaw(); - high = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + high = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) { @@ -578,7 +578,7 @@ static int opBOUND_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); low = geteaw(); - high = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + high = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) { @@ -597,7 +597,7 @@ static int opBOUND_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); low = geteal(); - high = readmeml(easeg, eaaddr + 4); if (abrt) return 1; + high = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) { @@ -615,7 +615,7 @@ static int opBOUND_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); low = geteal(); - high = readmeml(easeg, eaaddr + 4); if (abrt) return 1; + high = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) { @@ -772,7 +772,7 @@ static int opCPUID(uint32_t fetchdat) CLOCK_CYCLES(9); return 0; } - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -785,7 +785,7 @@ static int opRDMSR(uint32_t fetchdat) CLOCK_CYCLES(9); return 0; } - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } @@ -798,7 +798,7 @@ static int opWRMSR(uint32_t fetchdat) CLOCK_CYCLES(9); return 0; } - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } diff --git a/src/x86_ops_mmx.h b/src/x86_ops_mmx.h index 19099d9..2d82ce3 100644 --- a/src/x86_ops_mmx.h +++ b/src/x86_ops_mmx.h @@ -11,14 +11,14 @@ } \ else \ { \ - src.q = readmemq(easeg, eaaddr); if (abrt) return 1; \ + src.q = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1; \ CLOCK_CYCLES(2); \ } #define MMX_ENTER() \ if (!cpu_hasMMX) \ { \ - cpu_state.pc = oldpc; \ + cpu_state.pc = cpu_state.oldpc; \ x86illegal(); \ return 1; \ } \ @@ -33,7 +33,7 @@ static int opEMMS(uint32_t fetchdat) { if (!cpu_hasMMX) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } diff --git a/src/x86_ops_mmx_arith.h b/src/x86_ops_mmx_arith.h index c74cf96..44dcb82 100644 --- a/src/x86_ops_mmx_arith.h +++ b/src/x86_ops_mmx_arith.h @@ -294,8 +294,8 @@ static int opPMULLW_a16(uint32_t fetchdat) { MMX_REG src; - src.l[0] = readmeml(easeg, eaaddr); - src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; MM[cpu_reg].w[0] *= src.w[0]; MM[cpu_reg].w[1] *= src.w[1]; MM[cpu_reg].w[2] *= src.w[2]; @@ -321,8 +321,8 @@ static int opPMULLW_a32(uint32_t fetchdat) { MMX_REG src; - src.l[0] = readmeml(easeg, eaaddr); - src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; MM[cpu_reg].w[0] *= src.w[0]; MM[cpu_reg].w[1] *= src.w[1]; MM[cpu_reg].w[2] *= src.w[2]; @@ -349,8 +349,8 @@ static int opPMULHW_a16(uint32_t fetchdat) { MMX_REG src; - src.l[0] = readmeml(easeg, eaaddr); - src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) >> 16; MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]) >> 16; MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) >> 16; @@ -376,8 +376,8 @@ static int opPMULHW_a32(uint32_t fetchdat) { MMX_REG src; - src.l[0] = readmeml(easeg, eaaddr); - src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (abrt) return 0; MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) >> 16; MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]) >> 16; MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) >> 16; diff --git a/src/x86_ops_mmx_mov.h b/src/x86_ops_mmx_mov.h index 192d6fe..19b08e3 100644 --- a/src/x86_ops_mmx_mov.h +++ b/src/x86_ops_mmx_mov.h @@ -13,7 +13,7 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) { uint32_t dst; - dst = readmeml(easeg, eaaddr); if (abrt) return 1; + dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1; MM[cpu_reg].l[0] = dst; MM[cpu_reg].l[1] = 0; @@ -36,7 +36,7 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat) { uint32_t dst; - dst = readmeml(easeg, eaaddr); if (abrt) return 1; + dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1; MM[cpu_reg].l[0] = dst; MM[cpu_reg].l[1] = 0; @@ -57,8 +57,8 @@ static int opMOVD_mm_l_a16(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); - writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); + writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -75,8 +75,8 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); - writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); + writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -96,7 +96,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) { uint64_t dst; - dst = readmemq(easeg, eaaddr); if (abrt) return 1; + dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1; MM[cpu_reg].q = dst; CLOCK_CYCLES(2); } @@ -116,7 +116,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat) { uint64_t dst; - dst = readmemq(easeg, eaaddr); if (abrt) return 1; + dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1; MM[cpu_reg].q = dst; CLOCK_CYCLES(2); } @@ -135,8 +135,8 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - writememq(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -153,8 +153,8 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - writememq(easeg, eaaddr, MM[cpu_reg].q); if (abrt) return 1; + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].q); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; diff --git a/src/x86_ops_mmx_pack.h b/src/x86_ops_mmx_pack.h index 4ee8831..668d152 100644 --- a/src/x86_ops_mmx_pack.h +++ b/src/x86_ops_mmx_pack.h @@ -12,7 +12,7 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) { uint32_t src; - src = readmeml(easeg, eaaddr); if (abrt) return 0; + src = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 0; MM[cpu_reg].l[1] = src; CLOCK_CYCLES(2); @@ -33,7 +33,7 @@ static int opPUNPCKLDQ_a32(uint32_t fetchdat) { uint32_t src; - src = readmeml(easeg, eaaddr); if (abrt) return 0; + src = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 0; MM[cpu_reg].l[1] = src; CLOCK_CYCLES(2); diff --git a/src/x86_ops_mmx_shift.h b/src/x86_ops_mmx_shift.h index ab301a8..d591b11 100644 --- a/src/x86_ops_mmx_shift.h +++ b/src/x86_ops_mmx_shift.h @@ -6,7 +6,7 @@ } \ else \ { \ - shift = readmemb(easeg, eaaddr); if (abrt) return 0; \ + shift = readmemb(easeg, cpu_state.eaaddr); if (abrt) return 0; \ CLOCK_CYCLES(2); \ } @@ -53,7 +53,7 @@ static int opPSxxW_imm(uint32_t fetchdat) break; default: pclog("Bad PSxxW (0F 71) instruction %02X\n", op); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 0; } @@ -224,7 +224,7 @@ static int opPSxxD_imm(uint32_t fetchdat) break; default: pclog("Bad PSxxD (0F 72) instruction %02X\n", op); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 0; } @@ -376,7 +376,7 @@ static int opPSxxQ_imm(uint32_t fetchdat) break; default: pclog("Bad PSxxQ (0F 73) instruction %02X\n", op); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 0; } diff --git a/src/x86_ops_mov.h b/src/x86_ops_mov.h index 489383e..94dc523 100644 --- a/src/x86_ops_mov.h +++ b/src/x86_ops_mov.h @@ -158,7 +158,7 @@ static int opMOV_b_imm_a16(uint32_t fetchdat) uint8_t temp; fetch_ea_16(fetchdat); temp = readmemb(cs,cpu_state.pc); cpu_state.pc++; if (abrt) return 1; - CHECK_WRITE(ea_seg, eaaddr, eaaddr); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); seteab(temp); CLOCK_CYCLES(timing_rr); return abrt; @@ -214,7 +214,7 @@ static int opMOV_l_imm_a32(uint32_t fetchdat) static int opMOV_AL_a16(uint32_t fetchdat) { uint16_t addr = getwordf(); - uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -222,7 +222,7 @@ static int opMOV_AL_a16(uint32_t fetchdat) static int opMOV_AL_a32(uint32_t fetchdat) { uint32_t addr = getlong(); - uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -230,7 +230,7 @@ static int opMOV_AL_a32(uint32_t fetchdat) static int opMOV_AX_a16(uint32_t fetchdat) { uint16_t addr = getwordf(); - uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, addr); if (abrt) return 1; AX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -238,7 +238,7 @@ static int opMOV_AX_a16(uint32_t fetchdat) static int opMOV_AX_a32(uint32_t fetchdat) { uint32_t addr = getlong(); - uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, addr); if (abrt) return 1; AX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -246,7 +246,7 @@ static int opMOV_AX_a32(uint32_t fetchdat) static int opMOV_EAX_a16(uint32_t fetchdat) { uint16_t addr = getwordf(); - uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, addr); if (abrt) return 1; EAX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -254,7 +254,7 @@ static int opMOV_EAX_a16(uint32_t fetchdat) static int opMOV_EAX_a32(uint32_t fetchdat) { uint32_t addr = getlong(); - uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, addr); if (abrt) return 1; EAX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -263,42 +263,42 @@ static int opMOV_EAX_a32(uint32_t fetchdat) static int opMOV_a16_AL(uint32_t fetchdat) { uint16_t addr = getwordf(); - writememb(ea_seg->base, addr, AL); + writememb(cpu_state.ea_seg->base, addr, AL); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AL(uint32_t fetchdat) { uint32_t addr = getlong(); - writememb(ea_seg->base, addr, AL); + writememb(cpu_state.ea_seg->base, addr, AL); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_AX(uint32_t fetchdat) { uint16_t addr = getwordf(); - writememw(ea_seg->base, addr, AX); + writememw(cpu_state.ea_seg->base, addr, AX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AX(uint32_t fetchdat) { uint32_t addr = getlong(); if (abrt) return 1; - writememw(ea_seg->base, addr, AX); + writememw(cpu_state.ea_seg->base, addr, AX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_EAX(uint32_t fetchdat) { uint16_t addr = getwordf(); - writememl(ea_seg->base, addr, EAX); + writememl(cpu_state.ea_seg->base, addr, EAX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_EAX(uint32_t fetchdat) { uint32_t addr = getlong(); if (abrt) return 1; - writememl(ea_seg->base, addr, EAX); + writememl(cpu_state.ea_seg->base, addr, EAX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } @@ -308,7 +308,7 @@ static int opLEA_w_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - cpu_state.regs[cpu_reg].w = eaaddr; + cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; CLOCK_CYCLES(timing_rr); return 0; } @@ -316,7 +316,7 @@ static int opLEA_w_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - cpu_state.regs[cpu_reg].w = eaaddr; + cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; CLOCK_CYCLES(timing_rr); return 0; } @@ -325,7 +325,7 @@ static int opLEA_l_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - cpu_state.regs[cpu_reg].l = eaaddr & 0xffff; + cpu_state.regs[cpu_reg].l = cpu_state.eaaddr & 0xffff; CLOCK_CYCLES(timing_rr); return 0; } @@ -333,7 +333,7 @@ static int opLEA_l_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - cpu_state.regs[cpu_reg].l = eaaddr; + cpu_state.regs[cpu_reg].l = cpu_state.eaaddr; CLOCK_CYCLES(timing_rr); return 0; } @@ -343,7 +343,7 @@ static int opLEA_l_a32(uint32_t fetchdat) static int opXLAT_a16(uint32_t fetchdat) { uint32_t addr = (BX + AL)&0xFFFF; - uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES(5); return 0; @@ -351,7 +351,7 @@ static int opXLAT_a16(uint32_t fetchdat) static int opXLAT_a32(uint32_t fetchdat) { uint32_t addr = EBX + AL; - uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES(5); return 0; @@ -367,7 +367,7 @@ static int opMOV_b_r_a16(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); seteab(getr8(cpu_reg)); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -383,7 +383,7 @@ static int opMOV_b_r_a32(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); seteab(getr8(cpu_reg)); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -399,7 +399,7 @@ static int opMOV_w_r_a16(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); seteaw(cpu_state.regs[cpu_reg].w); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -415,7 +415,7 @@ static int opMOV_w_r_a32(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); seteaw(cpu_state.regs[cpu_reg].w); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -431,7 +431,7 @@ static int opMOV_l_r_a16(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); seteal(cpu_state.regs[cpu_reg].l); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -447,7 +447,7 @@ static int opMOV_l_r_a32(uint32_t fetchdat) } else { - CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); seteal(cpu_state.regs[cpu_reg].l); CLOCK_CYCLES(is486 ? 1 : 2); } @@ -465,7 +465,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat) else { uint8_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); temp = geteab(); if (abrt) return 1; setr8(cpu_reg, temp); CLOCK_CYCLES(is486 ? 1 : 4); @@ -483,7 +483,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat) else { uint8_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); temp = geteab(); if (abrt) return 1; setr8(cpu_reg, temp); CLOCK_CYCLES(is486 ? 1 : 4); @@ -501,7 +501,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat) else { uint16_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr+1); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); temp = geteaw(); if (abrt) return 1; cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES((is486) ? 1 : 4); @@ -519,7 +519,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat) else { uint16_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr+1); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); temp = geteaw(); if (abrt) return 1; cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES((is486) ? 1 : 4); @@ -537,7 +537,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat) else { uint32_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr+3); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); temp = geteal(); if (abrt) return 1; cpu_state.regs[cpu_reg].l = temp; CLOCK_CYCLES(is486 ? 1 : 4); @@ -555,7 +555,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) else { uint32_t temp; - CHECK_READ(ea_seg, eaaddr, eaaddr+3); + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); temp = geteal(); if (abrt) return 1; cpu_state.regs[cpu_reg].l = temp; CLOCK_CYCLES(is486 ? 1 : 4); @@ -574,7 +574,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) else \ { \ uint16_t temp; \ - CHECK_READ(ea_seg, eaaddr, eaaddr+1); \ + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); \ temp = geteaw(); if (abrt) return 1; \ cpu_state.regs[cpu_reg].w = temp; \ } \ @@ -592,7 +592,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) else \ { \ uint16_t temp; \ - CHECK_READ(ea_seg, eaaddr, eaaddr+1); \ + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); \ temp = geteaw(); if (abrt) return 1; \ cpu_state.regs[cpu_reg].w = temp; \ } \ @@ -610,7 +610,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) else \ { \ uint32_t temp; \ - CHECK_READ(ea_seg, eaaddr, eaaddr+3); \ + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); \ temp = geteal(); if (abrt) return 1; \ cpu_state.regs[cpu_reg].l = temp; \ } \ @@ -628,7 +628,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) else \ { \ uint32_t temp; \ - CHECK_READ(ea_seg, eaaddr, eaaddr+3); \ + CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); \ temp = geteal(); if (abrt) return 1; \ cpu_state.regs[cpu_reg].l = temp; \ } \ diff --git a/src/x86_ops_mov_ctrl.h b/src/x86_ops_mov_ctrl.h index 0c3f7b8..4960d35 100644 --- a/src/x86_ops_mov_ctrl.h +++ b/src/x86_ops_mov_ctrl.h @@ -28,7 +28,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat) } default: pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -65,7 +65,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat) } default: pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -136,7 +136,7 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat) default: pclog("Bad load CR%i\n", cpu_reg); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } @@ -179,7 +179,7 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat) default: pclog("Bad load CR%i\n", cpu_reg); - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); break; } diff --git a/src/x86_ops_mov_seg.h b/src/x86_ops_mov_seg.h index 664f858..283c6db 100644 --- a/src/x86_ops_mov_seg.h +++ b/src/x86_ops_mov_seg.h @@ -147,14 +147,14 @@ static int opMOV_seg_w_a16(uint32_t fetchdat) case 0x10: /*SS*/ loadseg(new_seg, &_ss); if (abrt) return 1; - oldpc = cpu_state.pc; - op32 = use32; - ssegs = 0; - ea_seg = &_ds; + cpu_state.oldpc = cpu_state.pc; + cpu_state.op32 = use32; + cpu_state.ssegs = 0; + cpu_state.ea_seg = &_ds; fetchdat = fastreadl(cs + cpu_state.pc); cpu_state.pc++; if (abrt) return 1; - x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); return 1; case 0x20: /*FS*/ loadseg(new_seg, &_fs); @@ -186,14 +186,14 @@ static int opMOV_seg_w_a32(uint32_t fetchdat) case 0x10: /*SS*/ loadseg(new_seg, &_ss); if (abrt) return 1; - oldpc = cpu_state.pc; - op32 = use32; - ssegs = 0; - ea_seg = &_ds; + cpu_state.oldpc = cpu_state.pc; + cpu_state.op32 = use32; + cpu_state.ssegs = 0; + cpu_state.ea_seg = &_ds; fetchdat = fastreadl(cs + cpu_state.pc); cpu_state.pc++; if (abrt) return 1; - x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); return 1; case 0x20: /*FS*/ loadseg(new_seg, &_fs); @@ -214,8 +214,8 @@ static int opLDS_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmemw(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + addr = readmemw(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; cpu_state.regs[cpu_reg].w = addr; @@ -228,8 +228,8 @@ static int opLDS_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmemw(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + addr = readmemw(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; cpu_state.regs[cpu_reg].w = addr; @@ -243,8 +243,8 @@ static int opLDS_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmeml(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + addr = readmeml(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; cpu_state.regs[cpu_reg].l = addr; @@ -258,8 +258,8 @@ static int opLDS_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmeml(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + addr = readmeml(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; cpu_state.regs[cpu_reg].l = addr; @@ -273,8 +273,8 @@ static int opLSS_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmemw(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + addr = readmemw(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; cpu_state.regs[cpu_reg].w = addr; @@ -287,8 +287,8 @@ static int opLSS_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmemw(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; + addr = readmemw(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; cpu_state.regs[cpu_reg].w = addr; @@ -302,8 +302,8 @@ static int opLSS_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmeml(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + addr = readmeml(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; cpu_state.regs[cpu_reg].l = addr; @@ -317,8 +317,8 @@ static int opLSS_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(cpu_mod == 3); - addr = readmeml(easeg, eaaddr); - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; + addr = readmeml(easeg, cpu_state.eaaddr); + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; cpu_state.regs[cpu_reg].l = addr; @@ -333,8 +333,8 @@ static int opLSS_l_a32(uint32_t fetchdat) \ fetch_ea_16(fetchdat); \ ILLEGAL_ON(cpu_mod == 3); \ - addr = readmemw(easeg, eaaddr); \ - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; \ + addr = readmemw(easeg, cpu_state.eaaddr); \ + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ cpu_state.regs[cpu_reg].w = addr; \ \ @@ -348,8 +348,8 @@ static int opLSS_l_a32(uint32_t fetchdat) \ fetch_ea_32(fetchdat); \ ILLEGAL_ON(cpu_mod == 3); \ - addr = readmemw(easeg, eaaddr); \ - seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; \ + addr = readmemw(easeg, cpu_state.eaaddr); \ + seg = readmemw(easeg, cpu_state.eaaddr + 2); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ cpu_state.regs[cpu_reg].w = addr; \ \ @@ -364,8 +364,8 @@ static int opLSS_l_a32(uint32_t fetchdat) \ fetch_ea_16(fetchdat); \ ILLEGAL_ON(cpu_mod == 3); \ - addr = readmeml(easeg, eaaddr); \ - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; \ + addr = readmeml(easeg, cpu_state.eaaddr); \ + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ cpu_state.regs[cpu_reg].l = addr; \ \ @@ -380,8 +380,8 @@ static int opLSS_l_a32(uint32_t fetchdat) \ fetch_ea_32(fetchdat); \ ILLEGAL_ON(cpu_mod == 3); \ - addr = readmeml(easeg, eaaddr); \ - seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; \ + addr = readmeml(easeg, cpu_state.eaaddr); \ + seg = readmemw(easeg, cpu_state.eaaddr + 4); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ cpu_state.regs[cpu_reg].l = addr; \ \ diff --git a/src/x86_ops_msr.h b/src/x86_ops_msr.h index cd9712f..a3080a8 100644 --- a/src/x86_ops_msr.h +++ b/src/x86_ops_msr.h @@ -2,7 +2,7 @@ static int opRDTSC(uint32_t fetchdat) { if (!cpu_hasrdtsc) { - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; x86illegal(); return 1; } diff --git a/src/x86_ops_pmode.h b/src/x86_ops_pmode.h index 423b29b..c03f84e 100644 --- a/src/x86_ops_pmode.h +++ b/src/x86_ops_pmode.h @@ -291,7 +291,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) base = gdt.base; //is32 ? gdt.base : (gdt.base & 0xffffff); if (is286) base |= 0xff000000; - writememl(easeg, eaaddr + 2, base); + writememl(easeg, cpu_state.eaaddr + 2, base); CLOCK_CYCLES(7); break; case 0x08: /*SIDT*/ @@ -299,7 +299,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) base = idt.base; if (is286) base |= 0xff000000; - writememl(easeg, eaaddr + 2, base); + writememl(easeg, cpu_state.eaaddr + 2, base); CLOCK_CYCLES(7); break; case 0x10: /*LGDT*/ @@ -311,7 +311,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) } // pclog("LGDT %08X:%08X\n", easeg, eaaddr); limit = geteaw(); - base = readmeml(0, easeg + eaaddr + 2); if (abrt) return 1; + base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (abrt) return 1; // pclog(" %08X %04X\n", base, limit); gdt.limit = limit; gdt.base = base; @@ -327,7 +327,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) } // pclog("LIDT %08X:%08X\n", easeg, eaaddr); limit = geteaw(); - base = readmeml(0, easeg + eaaddr + 2); if (abrt) return 1; + base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (abrt) return 1; // pclog(" %08X %04X\n", base, limit); idt.limit = limit; idt.base = base; @@ -361,7 +361,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) x86gpf(NULL, 0); break; } - mmu_invalidate(ds + eaaddr); + mmu_invalidate(ds + cpu_state.eaaddr); CLOCK_CYCLES(12); break; } diff --git a/src/x86_ops_prefix.h b/src/x86_ops_prefix.h index 134129f..f1db142 100644 --- a/src/x86_ops_prefix.h +++ b/src/x86_ops_prefix.h @@ -5,8 +5,8 @@ static int op ## name ## _w_a16(uint32_t fetchdat) \ if (abrt) return 1; \ cpu_state.pc++; \ \ - ea_seg = &seg; \ - ssegs = 1; \ + cpu_state.ea_seg = &seg; \ + cpu_state.ssegs = 1; \ CLOCK_CYCLES(4); \ \ return x86_opcodes[fetchdat & 0xff](fetchdat >> 8); \ @@ -18,8 +18,8 @@ static int op ## name ## _l_a16(uint32_t fetchdat) \ if (abrt) return 1; \ cpu_state.pc++; \ \ - ea_seg = &seg; \ - ssegs = 1; \ + cpu_state.ea_seg = &seg; \ + cpu_state.ssegs = 1; \ CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x100](fetchdat >> 8); \ @@ -31,8 +31,8 @@ static int op ## name ## _w_a32(uint32_t fetchdat) \ if (abrt) return 1; \ cpu_state.pc++; \ \ - ea_seg = &seg; \ - ssegs = 1; \ + cpu_state.ea_seg = &seg; \ + cpu_state.ssegs = 1; \ CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x200](fetchdat >> 8); \ @@ -44,8 +44,8 @@ static int op ## name ## _l_a32(uint32_t fetchdat) \ if (abrt) return 1; \ cpu_state.pc++; \ \ - ea_seg = &seg; \ - ssegs = 1; \ + cpu_state.ea_seg = &seg; \ + cpu_state.ssegs = 1; \ CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \ @@ -64,9 +64,9 @@ static int op_66(uint32_t fetchdat) /*Data size select*/ if (abrt) return 1; cpu_state.pc++; - op32 = ((use32 & 0x100) ^ 0x100) | (op32 & 0x200); + cpu_state.op32 = ((use32 & 0x100) ^ 0x100) | (cpu_state.op32 & 0x200); CLOCK_CYCLES(2); - return x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); } static int op_67(uint32_t fetchdat) /*Address size select*/ { @@ -74,7 +74,7 @@ static int op_67(uint32_t fetchdat) /*Address size select*/ if (abrt) return 1; cpu_state.pc++; - op32 = ((use32 & 0x200) ^ 0x200) | (op32 & 0x100); + cpu_state.op32 = ((use32 & 0x200) ^ 0x200) | (cpu_state.op32 & 0x100); CLOCK_CYCLES(2); - return x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); } diff --git a/src/x86_ops_stack.h b/src/x86_ops_stack.h index 345cde1..f97f2f1 100644 --- a/src/x86_ops_stack.h +++ b/src/x86_ops_stack.h @@ -444,14 +444,14 @@ static int opPOP_SS_w(uint32_t fetchdat) loadseg(temp_seg, &_ss); if (abrt) { ESP = temp_esp; return 1; } CLOCK_CYCLES(is486 ? 3 : 7); - oldpc = cpu_state.pc; - op32 = use32; - ssegs = 0; - ea_seg = &_ds; + cpu_state.oldpc = cpu_state.pc; + cpu_state.op32 = use32; + cpu_state.ssegs = 0; + cpu_state.ea_seg = &_ds; fetchdat = fastreadl(cs + cpu_state.pc); cpu_state.pc++; if (abrt) return 1; - x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); return 1; } @@ -463,14 +463,14 @@ static int opPOP_SS_l(uint32_t fetchdat) loadseg(temp_seg & 0xffff, &_ss); if (abrt) { ESP = temp_esp; return 1; } CLOCK_CYCLES(is486 ? 3 : 7); - oldpc = cpu_state.pc; - op32 = use32; - ssegs = 0; - ea_seg = &_ds; + cpu_state.oldpc = cpu_state.pc; + cpu_state.op32 = use32; + cpu_state.ssegs = 0; + cpu_state.ea_seg = &_ds; fetchdat = fastreadl(cs + cpu_state.pc); cpu_state.pc++; if (abrt) return 1; - x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); + x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); return 1; } diff --git a/src/x86_ops_string.h b/src/x86_ops_string.h index 91f779b..107dafd 100644 --- a/src/x86_ops_string.h +++ b/src/x86_ops_string.h @@ -1,6 +1,6 @@ static int opMOVSB_a16(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, SI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, SI); if (abrt) return 1; writememb(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI--; SI--; } else { DI++; SI++; } @@ -9,7 +9,7 @@ static int opMOVSB_a16(uint32_t fetchdat) } static int opMOVSB_a32(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, ESI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) return 1; writememb(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI--; ESI--; } else { EDI++; ESI++; } @@ -19,7 +19,7 @@ static int opMOVSB_a32(uint32_t fetchdat) static int opMOVSW_a16(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, SI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, SI); if (abrt) return 1; writememw(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI -= 2; SI -= 2; } else { DI += 2; SI += 2; } @@ -28,7 +28,7 @@ static int opMOVSW_a16(uint32_t fetchdat) } static int opMOVSW_a32(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, ESI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) return 1; writememw(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI -= 2; ESI -= 2; } else { EDI += 2; ESI += 2; } @@ -38,7 +38,7 @@ static int opMOVSW_a32(uint32_t fetchdat) static int opMOVSL_a16(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, SI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, SI); if (abrt) return 1; writememl(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI -= 4; SI -= 4; } else { DI += 4; SI += 4; } @@ -47,7 +47,7 @@ static int opMOVSL_a16(uint32_t fetchdat) } static int opMOVSL_a32(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, ESI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) return 1; writememl(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI -= 4; ESI -= 4; } else { EDI += 4; ESI += 4; } @@ -58,7 +58,7 @@ static int opMOVSL_a32(uint32_t fetchdat) static int opCMPSB_a16(uint32_t fetchdat) { - uint8_t src = readmemb(ea_seg->base, SI); + uint8_t src = readmemb(cpu_state.ea_seg->base, SI); uint8_t dst = readmemb(es, DI); if (abrt) return 1; setsub8(src, dst); if (flags & D_FLAG) { DI--; SI--; } @@ -68,7 +68,7 @@ static int opCMPSB_a16(uint32_t fetchdat) } static int opCMPSB_a32(uint32_t fetchdat) { - uint8_t src = readmemb(ea_seg->base, ESI); + uint8_t src = readmemb(cpu_state.ea_seg->base, ESI); uint8_t dst = readmemb(es, EDI); if (abrt) return 1; setsub8(src, dst); if (flags & D_FLAG) { EDI--; ESI--; } @@ -79,7 +79,7 @@ static int opCMPSB_a32(uint32_t fetchdat) static int opCMPSW_a16(uint32_t fetchdat) { - uint16_t src = readmemw(ea_seg->base, SI); + uint16_t src = readmemw(cpu_state.ea_seg->base, SI); uint16_t dst = readmemw(es, DI); if (abrt) return 1; setsub16(src, dst); if (flags & D_FLAG) { DI -= 2; SI -= 2; } @@ -89,7 +89,7 @@ static int opCMPSW_a16(uint32_t fetchdat) } static int opCMPSW_a32(uint32_t fetchdat) { - uint16_t src = readmemw(ea_seg->base, ESI); + uint16_t src = readmemw(cpu_state.ea_seg->base, ESI); uint16_t dst = readmemw(es, EDI); if (abrt) return 1; setsub16(src, dst); if (flags & D_FLAG) { EDI -= 2; ESI -= 2; } @@ -100,7 +100,7 @@ static int opCMPSW_a32(uint32_t fetchdat) static int opCMPSL_a16(uint32_t fetchdat) { - uint32_t src = readmeml(ea_seg->base, SI); + uint32_t src = readmeml(cpu_state.ea_seg->base, SI); uint32_t dst = readmeml(es, DI); if (abrt) return 1; setsub32(src, dst); if (flags & D_FLAG) { DI -= 4; SI -= 4; } @@ -110,7 +110,7 @@ static int opCMPSL_a16(uint32_t fetchdat) } static int opCMPSL_a32(uint32_t fetchdat) { - uint32_t src = readmeml(ea_seg->base, ESI); + uint32_t src = readmeml(cpu_state.ea_seg->base, ESI); uint32_t dst = readmeml(es, EDI); if (abrt) return 1; setsub32(src, dst); if (flags & D_FLAG) { EDI -= 4; ESI -= 4; } @@ -173,7 +173,7 @@ static int opSTOSL_a32(uint32_t fetchdat) static int opLODSB_a16(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, SI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, SI); if (abrt) return 1; AL = temp; if (flags & D_FLAG) SI--; else SI++; @@ -182,7 +182,7 @@ static int opLODSB_a16(uint32_t fetchdat) } static int opLODSB_a32(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, ESI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) return 1; AL = temp; if (flags & D_FLAG) ESI--; else ESI++; @@ -192,7 +192,7 @@ static int opLODSB_a32(uint32_t fetchdat) static int opLODSW_a16(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, SI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, SI); if (abrt) return 1; AX = temp; if (flags & D_FLAG) SI -= 2; else SI += 2; @@ -201,7 +201,7 @@ static int opLODSW_a16(uint32_t fetchdat) } static int opLODSW_a32(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, ESI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) return 1; AX = temp; if (flags & D_FLAG) ESI -= 2; else ESI += 2; @@ -211,7 +211,7 @@ static int opLODSW_a32(uint32_t fetchdat) static int opLODSL_a16(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, SI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, SI); if (abrt) return 1; EAX = temp; if (flags & D_FLAG) SI -= 4; else SI += 4; @@ -220,7 +220,7 @@ static int opLODSL_a16(uint32_t fetchdat) } static int opLODSL_a32(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, ESI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) return 1; EAX = temp; if (flags & D_FLAG) ESI -= 4; else ESI += 4; @@ -365,7 +365,7 @@ static int opINSL_a32(uint32_t fetchdat) static int opOUTSB_a16(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, SI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, SI); if (abrt) return 1; check_io_perm(DX); if (flags & D_FLAG) SI--; else SI++; @@ -375,7 +375,7 @@ static int opOUTSB_a16(uint32_t fetchdat) } static int opOUTSB_a32(uint32_t fetchdat) { - uint8_t temp = readmemb(ea_seg->base, ESI); if (abrt) return 1; + uint8_t temp = readmemb(cpu_state.ea_seg->base, ESI); if (abrt) return 1; check_io_perm(DX); if (flags & D_FLAG) ESI--; else ESI++; @@ -386,7 +386,7 @@ static int opOUTSB_a32(uint32_t fetchdat) static int opOUTSW_a16(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, SI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, SI); if (abrt) return 1; check_io_perm(DX); check_io_perm(DX + 1); if (flags & D_FLAG) SI -= 2; @@ -397,7 +397,7 @@ static int opOUTSW_a16(uint32_t fetchdat) } static int opOUTSW_a32(uint32_t fetchdat) { - uint16_t temp = readmemw(ea_seg->base, ESI); if (abrt) return 1; + uint16_t temp = readmemw(cpu_state.ea_seg->base, ESI); if (abrt) return 1; check_io_perm(DX); check_io_perm(DX + 1); if (flags & D_FLAG) ESI -= 2; @@ -409,7 +409,7 @@ static int opOUTSW_a32(uint32_t fetchdat) static int opOUTSL_a16(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, SI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, SI); if (abrt) return 1; check_io_perm(DX); check_io_perm(DX + 1); check_io_perm(DX + 2); @@ -422,7 +422,7 @@ static int opOUTSL_a16(uint32_t fetchdat) } static int opOUTSL_a32(uint32_t fetchdat) { - uint32_t temp = readmeml(ea_seg->base, ESI); if (abrt) return 1; + uint32_t temp = readmeml(cpu_state.ea_seg->base, ESI); if (abrt) return 1; check_io_perm(DX); check_io_perm(DX + 1); check_io_perm(DX + 2); diff --git a/src/x86seg.c b/src/x86seg.c index f2a8d8f..80a49af 100644 --- a/src/x86seg.c +++ b/src/x86seg.c @@ -76,7 +76,7 @@ void x86_doabrt(int x86_abrt) { // ingpf = 1; CS = oldcs; - cpu_state.pc = oldpc; + cpu_state.pc = cpu_state.oldpc; _cs.access = oldcpl << 5; // pclog("x86_doabrt - %02X %08X %04X:%08X %i\n", x86_abrt, abrt_error, CS, pc, ins); @@ -637,7 +637,7 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc) cgate32=(type&0x800); cgate16=!cgate32; oldcs=CS; - oldpc=cpu_state.pc; + cpu_state.oldpc = cpu_state.pc; count=segdat[2]&31; if ((DPL < CPL) || (DPL < (seg&3))) { diff --git a/src/x87.h b/src/x87.h index 96c1f78..e5ce5b2 100644 --- a/src/x87.h +++ b/src/x87.h @@ -1,6 +1,5 @@ uint32_t x87_pc_off,x87_op_off; uint16_t x87_pc_seg,x87_op_seg; -extern uint32_t op32; extern int TOP; extern uint16_t npxs, npxc; extern uint8_t tag[8]; diff --git a/src/x87_ops.h b/src/x87_ops.h index 97887d6..f2a5e8e 100644 --- a/src/x87_ops.h +++ b/src/x87_ops.h @@ -100,9 +100,9 @@ static inline double x87_ld80() uint64_t ll; } eind; } test; - test.eind.ll = readmeml(easeg,eaaddr); - test.eind.ll |= (uint64_t)readmeml(easeg,eaaddr+4)<<32; - test.begin = readmemw(easeg,eaaddr+8); + test.eind.ll = readmeml(easeg,cpu_state.eaaddr); + test.eind.ll |= (uint64_t)readmeml(easeg,cpu_state.eaaddr+4)<<32; + test.begin = readmemw(easeg,cpu_state.eaaddr+8); int64_t exp64 = (((test.begin&0x7fff) - BIAS80)); int64_t blah = ((exp64 >0)?exp64:-exp64)&0x3ff; @@ -156,9 +156,9 @@ static inline void x87_st80(double d) test.begin = (((int16_t)sign80)<<15)| (int16_t)exp80final; test.eind.ll = mant80final; - writememl(easeg,eaaddr,test.eind.ll); - writememl(easeg,eaaddr+4,test.eind.ll>>32); - writememw(easeg,eaaddr+8,test.begin); + writememl(easeg,cpu_state.eaaddr,test.eind.ll); + writememl(easeg,cpu_state.eaaddr+4,test.eind.ll>>32); + writememw(easeg,cpu_state.eaaddr+8,test.begin); } static inline void x87_st_fsave(int reg) @@ -167,9 +167,9 @@ static inline void x87_st_fsave(int reg) if (tag[reg] & TAG_UINT64) { - writememl(easeg, eaaddr, ST_i64[reg] & 0xffffffff); - writememl(easeg, eaaddr + 4, ST_i64[reg] >> 32); - writememw(easeg, eaaddr + 8, 0x5555); + writememl(easeg, cpu_state.eaaddr, ST_i64[reg] & 0xffffffff); + writememl(easeg, cpu_state.eaaddr + 4, ST_i64[reg] >> 32); + writememw(easeg, cpu_state.eaaddr + 8, 0x5555); } else x87_st80(ST[reg]); @@ -181,13 +181,13 @@ static inline void x87_ld_frstor(int reg) reg = (TOP + reg) & 7; - temp = readmemw(easeg, eaaddr + 8); + temp = readmemw(easeg, cpu_state.eaaddr + 8); if (temp == 0x5555 && tag[reg] == 2) { tag[reg] = TAG_UINT64; - ST_i64[reg] = readmeml(easeg, eaaddr); - ST_i64[reg] |= ((uint64_t)readmeml(easeg, eaaddr + 4) << 32); + ST_i64[reg] = readmeml(easeg, cpu_state.eaaddr); + ST_i64[reg] |= ((uint64_t)readmeml(easeg, cpu_state.eaaddr + 4) << 32); ST[reg] = (double)ST_i64[reg]; } else @@ -196,16 +196,16 @@ static inline void x87_ld_frstor(int reg) static inline void x87_ldmmx(MMX_REG *r) { - r->l[0] = readmeml(easeg, eaaddr); - r->l[1] = readmeml(easeg, eaaddr + 4); - r->w[4] = readmemw(easeg, eaaddr + 8); + r->l[0] = readmeml(easeg, cpu_state.eaaddr); + r->l[1] = readmeml(easeg, cpu_state.eaaddr + 4); + r->w[4] = readmemw(easeg, cpu_state.eaaddr + 8); } static inline void x87_stmmx(MMX_REG r) { - writememl(easeg, eaaddr, r.l[0]); - writememl(easeg, eaaddr + 4, r.l[1]); - writememw(easeg, eaaddr + 8, 0xffff); + writememl(easeg, cpu_state.eaaddr, r.l[0]); + writememl(easeg, cpu_state.eaaddr + 4, r.l[1]); + writememw(easeg, cpu_state.eaaddr + 8, 0xffff); } static inline uint16_t x87_compare(double a, double b) diff --git a/src/x87_ops_arith.h b/src/x87_ops_arith.h index 74c5049..0eb395e 100644 --- a/src/x87_ops_arith.h +++ b/src/x87_ops_arith.h @@ -183,7 +183,7 @@ static int opFUCOMPP(uint32_t fetchdat) { FP_ENTER(); cpu_state.pc++; - if (fplog) pclog("FUCOMPP\n", easeg, eaaddr); + if (fplog) pclog("FUCOMPP\n", easeg, cpu_state.eaaddr); npxs &= ~(C0|C2|C3); npxs |= x87_ucompare(ST(0), ST(1)); x87_pop(); diff --git a/src/x87_ops_loadstore.h b/src/x87_ops_loadstore.h index b6eaa11..02aac09 100644 --- a/src/x87_ops_loadstore.h +++ b/src/x87_ops_loadstore.h @@ -3,7 +3,7 @@ static int opFILDiw_a16(uint32_t fetchdat) int16_t temp; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FILDw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr); temp = geteaw(); if (abrt) return 1; if (fplog) pclog(" %f\n", (double)temp); x87_push((double)temp); @@ -15,7 +15,7 @@ static int opFILDiw_a32(uint32_t fetchdat) int16_t temp; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FILDw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr); temp = geteaw(); if (abrt) return 1; if (fplog) pclog(" %f\n", (double)temp); x87_push((double)temp); @@ -28,7 +28,7 @@ static int opFISTiw_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FISTw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ @@ -41,7 +41,7 @@ static int opFISTiw_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FISTw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ @@ -55,7 +55,7 @@ static int opFISTPiw_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FISTw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ @@ -69,7 +69,7 @@ static int opFISTPiw_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FISTw %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ @@ -84,9 +84,9 @@ static int opFILDiq_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FILDl %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = geteaq(); if (abrt) return 1; - if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,eaaddr), readmeml(easeg,eaaddr+4)); + if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4)); x87_push((double)temp64); ST_i64[TOP] = temp64; tag[TOP] |= TAG_UINT64; @@ -99,9 +99,9 @@ static int opFILDiq_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FILDl %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = geteaq(); if (abrt) return 1; - if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,eaaddr), readmeml(easeg,eaaddr+4)); + if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4)); x87_push((double)temp64); ST_i64[TOP] = temp64; tag[TOP] |= TAG_UINT64; @@ -116,7 +116,7 @@ static int FBSTP_a16(uint32_t fetchdat) int c; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FBSTP %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr); tempd = ST(0); if (tempd < 0.0) tempd = -tempd; @@ -128,11 +128,11 @@ static int FBSTP_a16(uint32_t fetchdat) tempc |= ((uint8_t)floor(fmod(tempd, 10.0))) << 4; tempd -= floor(fmod(tempd, 10.0)); tempd /= 10.0; - writememb(easeg, eaaddr + c, tempc); + writememb(easeg, cpu_state.eaaddr + c, tempc); } tempc = (uint8_t)floor(fmod(tempd, 10.0)); if (ST(0) < 0.0) tempc |= 0x80; - writememb(easeg, eaaddr + 9, tempc); if (abrt) return 1; + writememb(easeg, cpu_state.eaaddr + 9, tempc); if (abrt) return 1; x87_pop(); return 0; } @@ -142,7 +142,7 @@ static int FBSTP_a32(uint32_t fetchdat) int c; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FBSTP %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr); tempd = ST(0); if (tempd < 0.0) tempd = -tempd; @@ -154,11 +154,11 @@ static int FBSTP_a32(uint32_t fetchdat) tempc |= ((uint8_t)floor(fmod(tempd, 10.0))) << 4; tempd -= floor(fmod(tempd, 10.0)); tempd /= 10.0; - writememb(easeg, eaaddr + c, tempc); + writememb(easeg, cpu_state.eaaddr + c, tempc); } tempc = (uint8_t)floor(fmod(tempd, 10.0)); if (ST(0) < 0.0) tempc |= 0x80; - writememb(easeg, eaaddr + 9, tempc); if (abrt) return 1; + writememb(easeg, cpu_state.eaaddr + 9, tempc); if (abrt) return 1; x87_pop(); return 0; } @@ -168,7 +168,7 @@ static int FISTPiq_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FISTPl %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr); if (tag[TOP] & TAG_UINT64) temp64 = ST_i64[TOP]; else @@ -183,7 +183,7 @@ static int FISTPiq_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FISTPl %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr); if (tag[TOP] & TAG_UINT64) temp64 = ST_i64[TOP]; else @@ -199,7 +199,7 @@ static int opFILDil_a16(uint32_t fetchdat) int32_t templ; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FILDs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr); templ = geteal(); if (abrt) return 1; if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ); x87_push((double)templ); @@ -211,7 +211,7 @@ static int opFILDil_a32(uint32_t fetchdat) int32_t templ; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FILDs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr); templ = geteal(); if (abrt) return 1; if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ); x87_push((double)templ); @@ -224,7 +224,7 @@ static int opFISTil_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FISTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ @@ -237,7 +237,7 @@ static int opFISTil_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FISTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ @@ -251,7 +251,7 @@ static int opFISTPil_a16(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FISTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ @@ -265,7 +265,7 @@ static int opFISTPil_a32(uint32_t fetchdat) int64_t temp64; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FISTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr); temp64 = x87_fround(ST(0)); /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ @@ -280,7 +280,7 @@ static int opFLDe_a16(uint32_t fetchdat) double t; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FLDe %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr); t=x87_ld80(); if (abrt) return 1; if (fplog) pclog(" %f\n", t); x87_push(t); @@ -292,7 +292,7 @@ static int opFLDe_a32(uint32_t fetchdat) double t; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FLDe %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr); t=x87_ld80(); if (abrt) return 1; if (fplog) pclog(" %f\n", t); x87_push(t); @@ -304,7 +304,7 @@ static int opFSTPe_a16(uint32_t fetchdat) { FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTPe %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr); x87_st80(ST(0)); if (abrt) return 1; x87_pop(); CLOCK_CYCLES(6); @@ -314,7 +314,7 @@ static int opFSTPe_a32(uint32_t fetchdat) { FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTPe %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr); x87_st80(ST(0)); if (abrt) return 1; x87_pop(); CLOCK_CYCLES(6); @@ -326,7 +326,7 @@ static int opFLDd_a16(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FLDd %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr); t.i = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f\n", t.d); x87_push(t.d); @@ -338,7 +338,7 @@ static int opFLDd_a32(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FLDd %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr); t.i = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f\n", t.d); x87_push(t.d); @@ -351,7 +351,7 @@ static int opFSTd_a16(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr); t.d = ST(0); seteaq(t.i); CLOCK_CYCLES(8); @@ -362,7 +362,7 @@ static int opFSTd_a32(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr); t.d = ST(0); seteaq(t.i); CLOCK_CYCLES(8); @@ -374,8 +374,8 @@ static int opFSTPd_a16(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_16(fetchdat); - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr); t.d = ST(0); seteaq(t.i); if (abrt) return 1; x87_pop(); @@ -387,8 +387,8 @@ static int opFSTPd_a32(uint32_t fetchdat) x87_td t; FP_ENTER(); fetch_ea_32(fetchdat); - CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); + CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr); t.d = ST(0); seteaq(t.i); if (abrt) return 1; x87_pop(); @@ -401,7 +401,7 @@ static int opFLDs_a16(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FLDs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.i = geteal(); if (abrt) return 1; if (fplog) pclog(" %f\n", ts.s); x87_push((double)ts.s); @@ -413,7 +413,7 @@ static int opFLDs_a32(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FLDs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.i = geteal(); if (abrt) return 1; if (fplog) pclog(" %f\n", ts.s); x87_push((double)ts.s); @@ -426,7 +426,7 @@ static int opFSTs_a16(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.s = (float)ST(0); seteal(ts.i); CLOCK_CYCLES(7); @@ -437,7 +437,7 @@ static int opFSTs_a32(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.s = (float)ST(0); seteal(ts.i); CLOCK_CYCLES(7); @@ -449,7 +449,7 @@ static int opFSTPs_a16(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.s = (float)ST(0); seteal(ts.i); if (abrt) return 1; x87_pop(); @@ -461,7 +461,7 @@ static int opFSTPs_a32(uint32_t fetchdat) x87_ts ts; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr); ts.s = (float)ST(0); seteal(ts.i); if (abrt) return 1; x87_pop(); diff --git a/src/x87_ops_misc.h b/src/x87_ops_misc.h index 2369c09..9e64ee6 100644 --- a/src/x87_ops_misc.h +++ b/src/x87_ops_misc.h @@ -80,32 +80,32 @@ static int opFSTP(uint32_t fetchdat) static int FSTOR() { FP_ENTER(); - switch ((cr0 & 1) | (op32 & 0x100)) + switch ((cr0 & 1) | (cpu_state.op32 & 0x100)) { case 0x000: /*16-bit real mode*/ case 0x001: /*16-bit protected mode*/ - npxc = readmemw(easeg, eaaddr); - npxs = readmemw(easeg, eaaddr+2); - x87_settag(readmemw(easeg, eaaddr+4)); + npxc = readmemw(easeg, cpu_state.eaaddr); + npxs = readmemw(easeg, cpu_state.eaaddr+2); + x87_settag(readmemw(easeg, cpu_state.eaaddr+4)); TOP = (npxs >> 11) & 7; - eaaddr += 14; + cpu_state.eaaddr += 14; break; case 0x100: /*32-bit real mode*/ case 0x101: /*32-bit protected mode*/ - npxc = readmemw(easeg, eaaddr); - npxs = readmemw(easeg, eaaddr+4); - x87_settag(readmemw(easeg, eaaddr+8)); + npxc = readmemw(easeg, cpu_state.eaaddr); + npxs = readmemw(easeg, cpu_state.eaaddr+4); + x87_settag(readmemw(easeg, cpu_state.eaaddr+8)); TOP = (npxs >> 11) & 7; - eaaddr += 28; + cpu_state.eaaddr += 28; break; } - x87_ldmmx(&MM[0]); x87_ld_frstor(0); eaaddr += 10; - x87_ldmmx(&MM[1]); x87_ld_frstor(1); eaaddr += 10; - x87_ldmmx(&MM[2]); x87_ld_frstor(2); eaaddr += 10; - x87_ldmmx(&MM[3]); x87_ld_frstor(3); eaaddr += 10; - x87_ldmmx(&MM[4]); x87_ld_frstor(4); eaaddr += 10; - x87_ldmmx(&MM[5]); x87_ld_frstor(5); eaaddr += 10; - x87_ldmmx(&MM[6]); x87_ld_frstor(6); eaaddr += 10; + x87_ldmmx(&MM[0]); x87_ld_frstor(0); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[1]); x87_ld_frstor(1); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[2]); x87_ld_frstor(2); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[3]); x87_ld_frstor(3); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[4]); x87_ld_frstor(4); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[5]); x87_ld_frstor(5); cpu_state.eaaddr += 10; + x87_ldmmx(&MM[6]); x87_ld_frstor(6); cpu_state.eaaddr += 10; x87_ldmmx(&MM[7]); x87_ld_frstor(7); ismmx = 0; @@ -117,7 +117,7 @@ static int FSTOR() ismmx = 1; CLOCK_CYCLES((cr0 & 1) ? 34 : 44); - if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, eaaddr, ismmx, TOP, x87_gettag()); + if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, ismmx, TOP, x87_gettag()); return abrt; } static int opFSTOR_a16(uint32_t fetchdat) @@ -138,133 +138,133 @@ static int opFSTOR_a32(uint32_t fetchdat) static int FSAVE() { FP_ENTER(); - if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, eaaddr, ismmx); + if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, ismmx); npxs = (npxs & ~(7 << 11)) | (TOP << 11); - switch ((cr0&1)|(op32&0x100)) + switch ((cr0 & 1) | (cpu_state.op32 & 0x100)) { case 0x000: /*16-bit real mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+2,npxs); - writememw(easeg,eaaddr+4,x87_gettag()); - writememw(easeg,eaaddr+6,x87_pc_off); - writememw(easeg,eaaddr+10,x87_op_off); - eaaddr+=14; + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+2,npxs); + writememw(easeg,cpu_state.eaaddr+4,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+6,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+10,x87_op_off); + cpu_state.eaaddr+=14; if (ismmx) { - x87_stmmx(MM[0]); eaaddr+=10; - x87_stmmx(MM[1]); eaaddr+=10; - x87_stmmx(MM[2]); eaaddr+=10; - x87_stmmx(MM[3]); eaaddr+=10; - x87_stmmx(MM[4]); eaaddr+=10; - x87_stmmx(MM[5]); eaaddr+=10; - x87_stmmx(MM[6]); eaaddr+=10; + x87_stmmx(MM[0]); cpu_state.eaaddr+=10; + x87_stmmx(MM[1]); cpu_state.eaaddr+=10; + x87_stmmx(MM[2]); cpu_state.eaaddr+=10; + x87_stmmx(MM[3]); cpu_state.eaaddr+=10; + x87_stmmx(MM[4]); cpu_state.eaaddr+=10; + x87_stmmx(MM[5]); cpu_state.eaaddr+=10; + x87_stmmx(MM[6]); cpu_state.eaaddr+=10; x87_stmmx(MM[7]); } else { - x87_st_fsave(0); eaaddr+=10; - x87_st_fsave(1); eaaddr+=10; - x87_st_fsave(2); eaaddr+=10; - x87_st_fsave(3); eaaddr+=10; - x87_st_fsave(4); eaaddr+=10; - x87_st_fsave(5); eaaddr+=10; - x87_st_fsave(6); eaaddr+=10; + x87_st_fsave(0); cpu_state.eaaddr+=10; + x87_st_fsave(1); cpu_state.eaaddr+=10; + x87_st_fsave(2); cpu_state.eaaddr+=10; + x87_st_fsave(3); cpu_state.eaaddr+=10; + x87_st_fsave(4); cpu_state.eaaddr+=10; + x87_st_fsave(5); cpu_state.eaaddr+=10; + x87_st_fsave(6); cpu_state.eaaddr+=10; x87_st_fsave(7); } break; case 0x001: /*16-bit protected mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+2,npxs); - writememw(easeg,eaaddr+4,x87_gettag()); - writememw(easeg,eaaddr+6,x87_pc_off); - writememw(easeg,eaaddr+8,x87_pc_seg); - writememw(easeg,eaaddr+10,x87_op_off); - writememw(easeg,eaaddr+12,x87_op_seg); - eaaddr+=14; + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+2,npxs); + writememw(easeg,cpu_state.eaaddr+4,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+6,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg); + writememw(easeg,cpu_state.eaaddr+10,x87_op_off); + writememw(easeg,cpu_state.eaaddr+12,x87_op_seg); + cpu_state.eaaddr+=14; if (ismmx) { - x87_stmmx(MM[0]); eaaddr+=10; - x87_stmmx(MM[1]); eaaddr+=10; - x87_stmmx(MM[2]); eaaddr+=10; - x87_stmmx(MM[3]); eaaddr+=10; - x87_stmmx(MM[4]); eaaddr+=10; - x87_stmmx(MM[5]); eaaddr+=10; - x87_stmmx(MM[6]); eaaddr+=10; + x87_stmmx(MM[0]); cpu_state.eaaddr+=10; + x87_stmmx(MM[1]); cpu_state.eaaddr+=10; + x87_stmmx(MM[2]); cpu_state.eaaddr+=10; + x87_stmmx(MM[3]); cpu_state.eaaddr+=10; + x87_stmmx(MM[4]); cpu_state.eaaddr+=10; + x87_stmmx(MM[5]); cpu_state.eaaddr+=10; + x87_stmmx(MM[6]); cpu_state.eaaddr+=10; x87_stmmx(MM[7]); } else { - x87_st_fsave(0); eaaddr+=10; - x87_st_fsave(1); eaaddr+=10; - x87_st_fsave(2); eaaddr+=10; - x87_st_fsave(3); eaaddr+=10; - x87_st_fsave(4); eaaddr+=10; - x87_st_fsave(5); eaaddr+=10; - x87_st_fsave(6); eaaddr+=10; + x87_st_fsave(0); cpu_state.eaaddr+=10; + x87_st_fsave(1); cpu_state.eaaddr+=10; + x87_st_fsave(2); cpu_state.eaaddr+=10; + x87_st_fsave(3); cpu_state.eaaddr+=10; + x87_st_fsave(4); cpu_state.eaaddr+=10; + x87_st_fsave(5); cpu_state.eaaddr+=10; + x87_st_fsave(6); cpu_state.eaaddr+=10; x87_st_fsave(7); } break; case 0x100: /*32-bit real mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+4,npxs); - writememw(easeg,eaaddr+8,x87_gettag()); - writememw(easeg,eaaddr+12,x87_pc_off); - writememw(easeg,eaaddr+20,x87_op_off); - writememl(easeg,eaaddr+24,(x87_op_off>>16)<<12); - eaaddr+=28; + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+4,npxs); + writememw(easeg,cpu_state.eaaddr+8,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+12,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+20,x87_op_off); + writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12); + cpu_state.eaaddr+=28; if (ismmx) { - x87_stmmx(MM[0]); eaaddr+=10; - x87_stmmx(MM[1]); eaaddr+=10; - x87_stmmx(MM[2]); eaaddr+=10; - x87_stmmx(MM[3]); eaaddr+=10; - x87_stmmx(MM[4]); eaaddr+=10; - x87_stmmx(MM[5]); eaaddr+=10; - x87_stmmx(MM[6]); eaaddr+=10; + x87_stmmx(MM[0]); cpu_state.eaaddr+=10; + x87_stmmx(MM[1]); cpu_state.eaaddr+=10; + x87_stmmx(MM[2]); cpu_state.eaaddr+=10; + x87_stmmx(MM[3]); cpu_state.eaaddr+=10; + x87_stmmx(MM[4]); cpu_state.eaaddr+=10; + x87_stmmx(MM[5]); cpu_state.eaaddr+=10; + x87_stmmx(MM[6]); cpu_state.eaaddr+=10; x87_stmmx(MM[7]); } else { - x87_st_fsave(0); eaaddr+=10; - x87_st_fsave(1); eaaddr+=10; - x87_st_fsave(2); eaaddr+=10; - x87_st_fsave(3); eaaddr+=10; - x87_st_fsave(4); eaaddr+=10; - x87_st_fsave(5); eaaddr+=10; - x87_st_fsave(6); eaaddr+=10; + x87_st_fsave(0); cpu_state.eaaddr+=10; + x87_st_fsave(1); cpu_state.eaaddr+=10; + x87_st_fsave(2); cpu_state.eaaddr+=10; + x87_st_fsave(3); cpu_state.eaaddr+=10; + x87_st_fsave(4); cpu_state.eaaddr+=10; + x87_st_fsave(5); cpu_state.eaaddr+=10; + x87_st_fsave(6); cpu_state.eaaddr+=10; x87_st_fsave(7); } break; case 0x101: /*32-bit protected mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+4,npxs); - writememw(easeg,eaaddr+8,x87_gettag()); - writememl(easeg,eaaddr+12,x87_pc_off); - writememl(easeg,eaaddr+16,x87_pc_seg); - writememl(easeg,eaaddr+20,x87_op_off); - writememl(easeg,eaaddr+24,x87_op_seg); - eaaddr+=28; + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+4,npxs); + writememw(easeg,cpu_state.eaaddr+8,x87_gettag()); + writememl(easeg,cpu_state.eaaddr+12,x87_pc_off); + writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg); + writememl(easeg,cpu_state.eaaddr+20,x87_op_off); + writememl(easeg,cpu_state.eaaddr+24,x87_op_seg); + cpu_state.eaaddr+=28; if (ismmx) { - x87_stmmx(MM[0]); eaaddr+=10; - x87_stmmx(MM[1]); eaaddr+=10; - x87_stmmx(MM[2]); eaaddr+=10; - x87_stmmx(MM[3]); eaaddr+=10; - x87_stmmx(MM[4]); eaaddr+=10; - x87_stmmx(MM[5]); eaaddr+=10; - x87_stmmx(MM[6]); eaaddr+=10; + x87_stmmx(MM[0]); cpu_state.eaaddr+=10; + x87_stmmx(MM[1]); cpu_state.eaaddr+=10; + x87_stmmx(MM[2]); cpu_state.eaaddr+=10; + x87_stmmx(MM[3]); cpu_state.eaaddr+=10; + x87_stmmx(MM[4]); cpu_state.eaaddr+=10; + x87_stmmx(MM[5]); cpu_state.eaaddr+=10; + x87_stmmx(MM[6]); cpu_state.eaaddr+=10; x87_stmmx(MM[7]); } else { - x87_st_fsave(0); eaaddr+=10; - x87_st_fsave(1); eaaddr+=10; - x87_st_fsave(2); eaaddr+=10; - x87_st_fsave(3); eaaddr+=10; - x87_st_fsave(4); eaaddr+=10; - x87_st_fsave(5); eaaddr+=10; - x87_st_fsave(6); eaaddr+=10; + x87_st_fsave(0); cpu_state.eaaddr+=10; + x87_st_fsave(1); cpu_state.eaaddr+=10; + x87_st_fsave(2); cpu_state.eaaddr+=10; + x87_st_fsave(3); cpu_state.eaaddr+=10; + x87_st_fsave(4); cpu_state.eaaddr+=10; + x87_st_fsave(5); cpu_state.eaaddr+=10; + x87_st_fsave(6); cpu_state.eaaddr+=10; x87_st_fsave(7); } break; @@ -291,7 +291,7 @@ static int opFSTSW_a16(uint32_t fetchdat) { FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr); seteaw((npxs & 0xC7FF) | (TOP << 11)); CLOCK_CYCLES(3); return abrt; @@ -300,7 +300,7 @@ static int opFSTSW_a32(uint32_t fetchdat) { FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr); seteaw((npxs & 0xC7FF) | (TOP << 11)); CLOCK_CYCLES(3); return abrt; @@ -659,21 +659,21 @@ static int opFCOS(uint32_t fetchdat) static int FLDENV() { FP_ENTER(); - if (fplog) pclog("FLDENV %08X:%08X\n", easeg, eaaddr); - switch ((cr0 & 1) | (op32 & 0x100)) + if (fplog) pclog("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr); + switch ((cr0 & 1) | (cpu_state.op32 & 0x100)) { case 0x000: /*16-bit real mode*/ case 0x001: /*16-bit protected mode*/ - npxc = readmemw(easeg, eaaddr); - npxs = readmemw(easeg, eaaddr+2); - x87_settag(readmemw(easeg, eaaddr+4)); + npxc = readmemw(easeg, cpu_state.eaaddr); + npxs = readmemw(easeg, cpu_state.eaaddr+2); + x87_settag(readmemw(easeg, cpu_state.eaaddr+4)); TOP = (npxs >> 11) & 7; break; case 0x100: /*32-bit real mode*/ case 0x101: /*32-bit protected mode*/ - npxc = readmemw(easeg, eaaddr); - npxs = readmemw(easeg, eaaddr+4); - x87_settag(readmemw(easeg, eaaddr+8)); + npxc = readmemw(easeg, cpu_state.eaaddr); + npxs = readmemw(easeg, cpu_state.eaaddr+4); + x87_settag(readmemw(easeg, cpu_state.eaaddr+8)); TOP = (npxs >> 11) & 7; break; } @@ -701,7 +701,7 @@ static int opFLDCW_a16(uint32_t fetchdat) uint16_t tempw; FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FLDCW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr); tempw = geteaw(); if (abrt) return 1; npxc = tempw; @@ -713,7 +713,7 @@ static int opFLDCW_a32(uint32_t fetchdat) uint16_t tempw; FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FLDCW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr); tempw = geteaw(); if (abrt) return 1; npxc = tempw; @@ -724,41 +724,41 @@ static int opFLDCW_a32(uint32_t fetchdat) static int FSTENV() { FP_ENTER(); - if (fplog) pclog("FSTENV %08X:%08X\n", easeg, eaaddr); - switch ((cr0 & 1) | (op32 & 0x100)) + if (fplog) pclog("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr); + switch ((cr0 & 1) | (cpu_state.op32 & 0x100)) { case 0x000: /*16-bit real mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+2,npxs); - writememw(easeg,eaaddr+4,x87_gettag()); - writememw(easeg,eaaddr+6,x87_pc_off); - writememw(easeg,eaaddr+10,x87_op_off); + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+2,npxs); + writememw(easeg,cpu_state.eaaddr+4,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+6,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+10,x87_op_off); break; case 0x001: /*16-bit protected mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+2,npxs); - writememw(easeg,eaaddr+4,x87_gettag()); - writememw(easeg,eaaddr+6,x87_pc_off); - writememw(easeg,eaaddr+8,x87_pc_seg); - writememw(easeg,eaaddr+10,x87_op_off); - writememw(easeg,eaaddr+12,x87_op_seg); + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+2,npxs); + writememw(easeg,cpu_state.eaaddr+4,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+6,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg); + writememw(easeg,cpu_state.eaaddr+10,x87_op_off); + writememw(easeg,cpu_state.eaaddr+12,x87_op_seg); break; case 0x100: /*32-bit real mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+4,npxs); - writememw(easeg,eaaddr+8,x87_gettag()); - writememw(easeg,eaaddr+12,x87_pc_off); - writememw(easeg,eaaddr+20,x87_op_off); - writememl(easeg,eaaddr+24,(x87_op_off>>16)<<12); + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+4,npxs); + writememw(easeg,cpu_state.eaaddr+8,x87_gettag()); + writememw(easeg,cpu_state.eaaddr+12,x87_pc_off); + writememw(easeg,cpu_state.eaaddr+20,x87_op_off); + writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12); break; case 0x101: /*32-bit protected mode*/ - writememw(easeg,eaaddr,npxc); - writememw(easeg,eaaddr+4,npxs); - writememw(easeg,eaaddr+8,x87_gettag()); - writememl(easeg,eaaddr+12,x87_pc_off); - writememl(easeg,eaaddr+16,x87_pc_seg); - writememl(easeg,eaaddr+20,x87_op_off); - writememl(easeg,eaaddr+24,x87_op_seg); + writememw(easeg,cpu_state.eaaddr,npxc); + writememw(easeg,cpu_state.eaaddr+4,npxs); + writememw(easeg,cpu_state.eaaddr+8,x87_gettag()); + writememl(easeg,cpu_state.eaaddr+12,x87_pc_off); + writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg); + writememl(easeg,cpu_state.eaaddr+20,x87_op_off); + writememl(easeg,cpu_state.eaaddr+24,x87_op_seg); break; } CLOCK_CYCLES((cr0 & 1) ? 56 : 67); @@ -784,7 +784,7 @@ static int opFSTCW_a16(uint32_t fetchdat) { FP_ENTER(); fetch_ea_16(fetchdat); - if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr); seteaw(npxc); CLOCK_CYCLES(3); return abrt; @@ -793,7 +793,7 @@ static int opFSTCW_a32(uint32_t fetchdat) { FP_ENTER(); fetch_ea_32(fetchdat); - if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr); + if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr); seteaw(npxc); CLOCK_CYCLES(3); return abrt;