Move some more variables into cpu_state structure. Minor speedup (~2%).

This commit is contained in:
SarahW 2016-08-17 21:28:16 +01:00
commit c664682758
43 changed files with 801 additions and 810 deletions

View file

@ -158,7 +158,7 @@ static int opMOV_b_imm_a16(uint32_t fetchdat)
uint8_t temp;
fetch_ea_16(fetchdat);
temp = readmemb(cs,cpu_state.pc); cpu_state.pc++; if (abrt) return 1;
CHECK_WRITE(ea_seg, eaaddr, eaaddr);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr);
seteab(temp);
CLOCK_CYCLES(timing_rr);
return abrt;
@ -214,7 +214,7 @@ static int opMOV_l_imm_a32(uint32_t fetchdat)
static int opMOV_AL_a16(uint32_t fetchdat)
{
uint16_t addr = getwordf();
uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1;
uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AL = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -222,7 +222,7 @@ static int opMOV_AL_a16(uint32_t fetchdat)
static int opMOV_AL_a32(uint32_t fetchdat)
{
uint32_t addr = getlong();
uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1;
uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AL = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -230,7 +230,7 @@ static int opMOV_AL_a32(uint32_t fetchdat)
static int opMOV_AX_a16(uint32_t fetchdat)
{
uint16_t addr = getwordf();
uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1;
uint16_t temp = readmemw(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AX = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -238,7 +238,7 @@ static int opMOV_AX_a16(uint32_t fetchdat)
static int opMOV_AX_a32(uint32_t fetchdat)
{
uint32_t addr = getlong();
uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1;
uint16_t temp = readmemw(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AX = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -246,7 +246,7 @@ static int opMOV_AX_a32(uint32_t fetchdat)
static int opMOV_EAX_a16(uint32_t fetchdat)
{
uint16_t addr = getwordf();
uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1;
uint32_t temp = readmeml(cpu_state.ea_seg->base, addr); if (abrt) return 1;
EAX = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -254,7 +254,7 @@ static int opMOV_EAX_a16(uint32_t fetchdat)
static int opMOV_EAX_a32(uint32_t fetchdat)
{
uint32_t addr = getlong();
uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1;
uint32_t temp = readmeml(cpu_state.ea_seg->base, addr); if (abrt) return 1;
EAX = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
return 0;
@ -263,42 +263,42 @@ static int opMOV_EAX_a32(uint32_t fetchdat)
static int opMOV_a16_AL(uint32_t fetchdat)
{
uint16_t addr = getwordf();
writememb(ea_seg->base, addr, AL);
writememb(cpu_state.ea_seg->base, addr, AL);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
static int opMOV_a32_AL(uint32_t fetchdat)
{
uint32_t addr = getlong();
writememb(ea_seg->base, addr, AL);
writememb(cpu_state.ea_seg->base, addr, AL);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
static int opMOV_a16_AX(uint32_t fetchdat)
{
uint16_t addr = getwordf();
writememw(ea_seg->base, addr, AX);
writememw(cpu_state.ea_seg->base, addr, AX);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
static int opMOV_a32_AX(uint32_t fetchdat)
{
uint32_t addr = getlong(); if (abrt) return 1;
writememw(ea_seg->base, addr, AX);
writememw(cpu_state.ea_seg->base, addr, AX);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
static int opMOV_a16_EAX(uint32_t fetchdat)
{
uint16_t addr = getwordf();
writememl(ea_seg->base, addr, EAX);
writememl(cpu_state.ea_seg->base, addr, EAX);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
static int opMOV_a32_EAX(uint32_t fetchdat)
{
uint32_t addr = getlong(); if (abrt) return 1;
writememl(ea_seg->base, addr, EAX);
writememl(cpu_state.ea_seg->base, addr, EAX);
CLOCK_CYCLES((is486) ? 1 : 2);
return abrt;
}
@ -308,7 +308,7 @@ static int opLEA_w_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].w = eaaddr;
cpu_state.regs[cpu_reg].w = cpu_state.eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -316,7 +316,7 @@ static int opLEA_w_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].w = eaaddr;
cpu_state.regs[cpu_reg].w = cpu_state.eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -325,7 +325,7 @@ static int opLEA_l_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].l = eaaddr & 0xffff;
cpu_state.regs[cpu_reg].l = cpu_state.eaaddr & 0xffff;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -333,7 +333,7 @@ static int opLEA_l_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].l = eaaddr;
cpu_state.regs[cpu_reg].l = cpu_state.eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -343,7 +343,7 @@ static int opLEA_l_a32(uint32_t fetchdat)
static int opXLAT_a16(uint32_t fetchdat)
{
uint32_t addr = (BX + AL)&0xFFFF;
uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1;
uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AL = temp;
CLOCK_CYCLES(5);
return 0;
@ -351,7 +351,7 @@ static int opXLAT_a16(uint32_t fetchdat)
static int opXLAT_a32(uint32_t fetchdat)
{
uint32_t addr = EBX + AL;
uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1;
uint8_t temp = readmemb(cpu_state.ea_seg->base, addr); if (abrt) return 1;
AL = temp;
CLOCK_CYCLES(5);
return 0;
@ -367,7 +367,7 @@ static int opMOV_b_r_a16(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr);
seteab(getr8(cpu_reg));
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -383,7 +383,7 @@ static int opMOV_b_r_a32(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr);
seteab(getr8(cpu_reg));
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -399,7 +399,7 @@ static int opMOV_w_r_a16(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1);
seteaw(cpu_state.regs[cpu_reg].w);
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -415,7 +415,7 @@ static int opMOV_w_r_a32(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1);
seteaw(cpu_state.regs[cpu_reg].w);
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -431,7 +431,7 @@ static int opMOV_l_r_a16(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3);
seteal(cpu_state.regs[cpu_reg].l);
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -447,7 +447,7 @@ static int opMOV_l_r_a32(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3);
seteal(cpu_state.regs[cpu_reg].l);
CLOCK_CYCLES(is486 ? 1 : 2);
}
@ -465,7 +465,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat)
else
{
uint8_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr);
temp = geteab(); if (abrt) return 1;
setr8(cpu_reg, temp);
CLOCK_CYCLES(is486 ? 1 : 4);
@ -483,7 +483,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat)
else
{
uint8_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr);
temp = geteab(); if (abrt) return 1;
setr8(cpu_reg, temp);
CLOCK_CYCLES(is486 ? 1 : 4);
@ -501,7 +501,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat)
else
{
uint16_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+1);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1);
temp = geteaw(); if (abrt) return 1;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
@ -519,7 +519,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat)
else
{
uint16_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+1);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1);
temp = geteaw(); if (abrt) return 1;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
@ -537,7 +537,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat)
else
{
uint32_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+3);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3);
temp = geteal(); if (abrt) return 1;
cpu_state.regs[cpu_reg].l = temp;
CLOCK_CYCLES(is486 ? 1 : 4);
@ -555,7 +555,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
else
{
uint32_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+3);
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3);
temp = geteal(); if (abrt) return 1;
cpu_state.regs[cpu_reg].l = temp;
CLOCK_CYCLES(is486 ? 1 : 4);
@ -574,7 +574,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
else \
{ \
uint16_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); \
temp = geteaw(); if (abrt) return 1; \
cpu_state.regs[cpu_reg].w = temp; \
} \
@ -592,7 +592,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
else \
{ \
uint16_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); \
temp = geteaw(); if (abrt) return 1; \
cpu_state.regs[cpu_reg].w = temp; \
} \
@ -610,7 +610,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
else \
{ \
uint32_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); \
temp = geteal(); if (abrt) return 1; \
cpu_state.regs[cpu_reg].l = temp; \
} \
@ -628,7 +628,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
else \
{ \
uint32_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); \
temp = geteal(); if (abrt) return 1; \
cpu_state.regs[cpu_reg].l = temp; \
} \