Move some more variables into cpu_state structure. Minor speedup (~2%).
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a65411466e
commit
c664682758
43 changed files with 801 additions and 810 deletions
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@ -13,7 +13,7 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat)
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{
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uint32_t dst;
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dst = readmeml(easeg, eaaddr); if (abrt) return 1;
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dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1;
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MM[cpu_reg].l[0] = dst;
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MM[cpu_reg].l[1] = 0;
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@ -36,7 +36,7 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat)
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{
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uint32_t dst;
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dst = readmeml(easeg, eaaddr); if (abrt) return 1;
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dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1;
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MM[cpu_reg].l[0] = dst;
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MM[cpu_reg].l[1] = 0;
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@ -57,8 +57,8 @@ static int opMOVD_mm_l_a16(uint32_t fetchdat)
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3);
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writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
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writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CLOCK_CYCLES(2);
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}
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return 0;
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@ -75,8 +75,8 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat)
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3);
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writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
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writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CLOCK_CYCLES(2);
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}
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return 0;
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@ -96,7 +96,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat)
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{
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uint64_t dst;
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dst = readmemq(easeg, eaaddr); if (abrt) return 1;
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dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1;
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MM[cpu_reg].q = dst;
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CLOCK_CYCLES(2);
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}
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@ -116,7 +116,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat)
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{
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uint64_t dst;
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dst = readmemq(easeg, eaaddr); if (abrt) return 1;
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dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1;
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MM[cpu_reg].q = dst;
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CLOCK_CYCLES(2);
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}
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@ -135,8 +135,8 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat)
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
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writememq(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
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writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
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CLOCK_CYCLES(2);
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}
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return 0;
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@ -153,8 +153,8 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat)
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
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writememq(easeg, eaaddr, MM[cpu_reg].q); if (abrt) return 1;
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CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
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writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].q); if (abrt) return 1;
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CLOCK_CYCLES(2);
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}
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return 0;
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