Move some more variables into cpu_state structure. Minor speedup (~2%).

This commit is contained in:
SarahW 2016-08-17 21:28:16 +01:00
commit c664682758
43 changed files with 801 additions and 810 deletions

View file

@ -13,7 +13,7 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat)
{
uint32_t dst;
dst = readmeml(easeg, eaaddr); if (abrt) return 1;
dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1;
MM[cpu_reg].l[0] = dst;
MM[cpu_reg].l[1] = 0;
@ -36,7 +36,7 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat)
{
uint32_t dst;
dst = readmeml(easeg, eaaddr); if (abrt) return 1;
dst = readmeml(easeg, cpu_state.eaaddr); if (abrt) return 1;
MM[cpu_reg].l[0] = dst;
MM[cpu_reg].l[1] = 0;
@ -57,8 +57,8 @@ static int opMOVD_mm_l_a16(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3);
writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CLOCK_CYCLES(2);
}
return 0;
@ -75,8 +75,8 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3);
writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CLOCK_CYCLES(2);
}
return 0;
@ -96,7 +96,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat)
{
uint64_t dst;
dst = readmemq(easeg, eaaddr); if (abrt) return 1;
dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1;
MM[cpu_reg].q = dst;
CLOCK_CYCLES(2);
}
@ -116,7 +116,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat)
{
uint64_t dst;
dst = readmemq(easeg, eaaddr); if (abrt) return 1;
dst = readmemq(easeg, cpu_state.eaaddr); if (abrt) return 1;
MM[cpu_reg].q = dst;
CLOCK_CYCLES(2);
}
@ -135,8 +135,8 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
writememq(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1;
CLOCK_CYCLES(2);
}
return 0;
@ -153,8 +153,8 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat)
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
writememq(easeg, eaaddr, MM[cpu_reg].q); if (abrt) return 1;
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, MM[cpu_reg].q); if (abrt) return 1;
CLOCK_CYCLES(2);
}
return 0;