Move some more variables into cpu_state structure. Minor speedup (~2%).
This commit is contained in:
parent
a65411466e
commit
c664682758
43 changed files with 801 additions and 810 deletions
136
src/808x.c
136
src/808x.c
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@ -109,8 +109,6 @@ int shadowbios=0;
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int ins=0;
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//#define readmemb(a) (((a)<0xA0000)?ram[a]:readmembl(a))
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int ssegs;
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int fetchcycles=0,memcycs,fetchclocks;
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uint8_t prefetchqueue[6];
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@ -341,7 +339,7 @@ reg = If mod=11, (depending on data size, 16 bits/8 bits, 32 bits=extend 16 bit
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*/
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int cycles=0;
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uint32_t easeg,eaaddr;
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uint32_t easeg;
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int rmdat;
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uint16_t zero=0;
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@ -363,30 +361,30 @@ void makemod1table()
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static void fetcheal()
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{
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if (!cpu_mod && cpu_rm==6) { eaaddr=getword(); easeg=ds; FETCHADD(6); }
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if (!cpu_mod && cpu_rm==6) { cpu_state.eaaddr=getword(); easeg=ds; FETCHADD(6); }
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else
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{
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switch (cpu_mod)
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{
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case 0:
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eaaddr=0;
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cpu_state.eaaddr=0;
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if (cpu_rm&4) FETCHADD(5);
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else FETCHADD(7+slowrm[cpu_rm]);
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break;
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case 1:
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eaaddr=(uint16_t)(int8_t)FETCH();
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cpu_state.eaaddr=(uint16_t)(int8_t)FETCH();
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if (cpu_rm&4) FETCHADD(9);
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else FETCHADD(11+slowrm[cpu_rm]);
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break;
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case 2:
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eaaddr=getword();
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cpu_state.eaaddr=getword();
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if (cpu_rm&4) FETCHADD(9);
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else FETCHADD(11+slowrm[cpu_rm]);
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break;
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}
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eaaddr+=(*mod1add[0][cpu_rm])+(*mod1add[1][cpu_rm]);
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cpu_state.eaaddr+=(*mod1add[0][cpu_rm])+(*mod1add[1][cpu_rm]);
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easeg=*mod1seg[cpu_rm];
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eaaddr&=0xFFFF;
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cpu_state.eaaddr&=0xFFFF;
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}
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}
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@ -394,7 +392,7 @@ static inline uint8_t geteab()
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{
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if (cpu_mod == 3)
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return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm & 3].b.l;
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return readmemb(easeg+eaaddr);
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return readmemb(easeg+cpu_state.eaaddr);
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}
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static inline uint16_t geteaw()
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@ -402,7 +400,7 @@ static inline uint16_t geteaw()
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if (cpu_mod == 3)
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return cpu_state.regs[cpu_rm].w;
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// if (output==3) printf("GETEAW %04X:%08X\n",easeg,eaaddr);
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return readmemw(easeg,eaaddr);
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return readmemw(easeg,cpu_state.eaaddr);
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}
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static inline uint16_t geteaw2()
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@ -410,7 +408,7 @@ static inline uint16_t geteaw2()
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if (cpu_mod == 3)
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return cpu_state.regs[cpu_rm].w;
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// printf("Getting addr from %04X:%04X %05X\n",easeg,eaaddr+2,easeg+eaaddr+2);
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return readmemw(easeg,(eaaddr+2)&0xFFFF);
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return readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF);
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}
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static inline void seteab(uint8_t val)
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@ -424,7 +422,7 @@ static inline void seteab(uint8_t val)
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}
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else
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{
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writememb(easeg+eaaddr,val);
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writememb(easeg+cpu_state.eaaddr,val);
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}
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}
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@ -434,7 +432,7 @@ static inline void seteaw(uint16_t val)
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cpu_state.regs[cpu_rm].w = val;
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else
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{
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writememw(easeg,eaaddr,val);
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writememw(easeg,cpu_state.eaaddr,val);
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// writememb(easeg+eaaddr+1,val>>8);
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}
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}
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@ -586,7 +584,7 @@ chdir(pcempath);
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else
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printf("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",AX,BX,CX,DX,DI,SI,BP,SP);
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printf("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,flags);
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printf("%04X:%04X %04X:%04X\n",oldcs,oldpc, oldcs2, oldpc2);
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printf("%04X:%04X %04X:%04X\n",oldcs,cpu_state.oldpc, oldcs2, oldpc2);
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printf("%i ins\n",ins);
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if (is386)
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printf("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real");
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@ -824,7 +822,7 @@ void rep(int fv)
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int c=CX;
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uint8_t temp2;
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uint16_t tempw,tempw2;
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uint16_t ipc=oldpc;//pc-1;
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uint16_t ipc = cpu_state.oldpc;//pc-1;
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int changeds=0;
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uint32_t oldds;
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startrep:
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@ -870,7 +868,7 @@ void rep(int fv)
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c--;
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cycles-=5;
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}
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); }
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
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else firstrepcycle=1;
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break;
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case 0xA4: /*REP MOVSB*/
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@ -992,7 +990,7 @@ void rep(int fv)
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c--;
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cycles-=4;
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}
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); }
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
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else firstrepcycle=1;
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break;
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case 0xAD: /*REP LODSW*/
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@ -1004,7 +1002,7 @@ void rep(int fv)
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c--;
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cycles-=4;
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}
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (ssegs) ssegs++; FETCHCLEAR(); }
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if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
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else firstrepcycle=1;
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break;
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case 0xAE: /*REP SCASB*/
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@ -1022,7 +1020,7 @@ void rep(int fv)
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cycles -= 15;
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}
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//if (output) printf("%i %i %i %i\n",c,(c>0),(fv==((flags&Z_FLAG)?1:0)),((c>0) && (fv==((flags&Z_FLAG)?1:0))));
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if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); }
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if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
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else firstrepcycle=1;
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// cycles-=120;
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break;
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@ -1038,7 +1036,7 @@ void rep(int fv)
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c--;
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cycles -= 15;
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}
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if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); }
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if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
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else firstrepcycle=1;
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break;
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default:
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@ -1095,7 +1093,7 @@ void execx86(int cycs)
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// if (output) printf("CLOCK %i %i\n",cycdiff,cycles);
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fetchclocks=0;
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oldcs=CS;
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oldpc=cpu_state.pc;
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cpu_state.oldpc = cpu_state.pc;
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opcodestart:
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opcode=FETCH();
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tempc=flags&C_FLAG;
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@ -1170,13 +1168,13 @@ void execx86(int cycs)
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break;
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case 0x06: /*PUSH ES*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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writememw(ss,((SP-2)&0xFFFF),ES);
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SP-=2;
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cycles-=14;
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break;
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case 0x07: /*POP ES*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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tempw=readmemw(ss,SP);
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loadseg(tempw,&_es);
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SP+=2;
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@ -1233,13 +1231,13 @@ void execx86(int cycs)
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break;
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case 0x0E: /*PUSH CS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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writememw(ss,((SP-2)&0xFFFF),CS);
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SP-=2;
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cycles-=14;
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break;
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case 0x0F: /*POP CS - 8088/8086 only*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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tempw=readmemw(ss,SP);
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loadseg(tempw,&_cs);
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SP+=2;
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@ -1292,13 +1290,13 @@ void execx86(int cycs)
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break;
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case 0x16: /*PUSH SS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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writememw(ss,((SP-2)&0xFFFF),SS);
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SP-=2;
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cycles-=14;
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break;
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case 0x17: /*POP SS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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tempw=readmemw(ss,SP);
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loadseg(tempw,&_ss);
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SP+=2;
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@ -1357,16 +1355,16 @@ void execx86(int cycs)
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break;
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case 0x1E: /*PUSH DS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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writememw(ss,((SP-2)&0xFFFF),DS);
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SP-=2;
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cycles-=14;
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break;
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case 0x1F: /*POP DS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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tempw=readmemw(ss,SP);
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loadseg(tempw,&_ds);
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if (ssegs) oldds=ds;
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if (cpu_state.ssegs) oldds=ds;
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SP+=2;
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cycles-=12;
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break;
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@ -1424,7 +1422,7 @@ void execx86(int cycs)
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oldss=ss;
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oldds=ds;
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ds=ss=es;
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ssegs=2;
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cpu_state.ssegs=2;
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cycles-=4;
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goto opcodestart;
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// break;
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@ -1500,7 +1498,7 @@ void execx86(int cycs)
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oldss=ss;
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oldds=ds;
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ds=ss=cs;
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ssegs=2;
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cpu_state.ssegs=2;
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cycles-=4;
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goto opcodestart;
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case 0x2F: /*DAS*/
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@ -1576,7 +1574,7 @@ void execx86(int cycs)
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oldss=ss;
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oldds=ds;
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ds=ss=ss;
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ssegs=2;
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cpu_state.ssegs=2;
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cycles-=4;
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goto opcodestart;
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// break;
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@ -1637,7 +1635,7 @@ void execx86(int cycs)
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oldss=ss;
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oldds=ds;
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ds=ss=ds;
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ssegs=2;
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cpu_state.ssegs=2;
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cycles-=4;
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goto opcodestart;
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// break;
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@ -1670,14 +1668,14 @@ void execx86(int cycs)
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case 0x50: case 0x51: case 0x52: case 0x53: /*PUSH r16*/
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case 0x54: case 0x55: case 0x56: case 0x57:
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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SP-=2;
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writememw(ss,SP,cpu_state.regs[opcode&7].w);
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cycles-=15;
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break;
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case 0x58: case 0x59: case 0x5A: case 0x5B: /*POP r16*/
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case 0x5C: case 0x5D: case 0x5E: case 0x5F:
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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SP+=2;
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cpu_state.regs[opcode&7].w=readmemw(ss,(SP-2)&0xFFFF);
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cycles-=12;
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@ -2046,11 +2044,11 @@ void execx86(int cycs)
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seteaw(CS);
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break;
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case 0x18: /*DS*/
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if (ssegs) ds=oldds;
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if (cpu_state.ssegs) ds=oldds;
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seteaw(DS);
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break;
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case 0x10: /*SS*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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seteaw(SS);
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break;
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}
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@ -2059,7 +2057,7 @@ void execx86(int cycs)
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case 0x8D: /*LEA*/
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fetchea();
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cpu_state.regs[cpu_reg].w=eaaddr;
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cpu_state.regs[cpu_reg].w=cpu_state.eaaddr;
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cycles-=2;
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break;
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@ -2080,12 +2078,12 @@ void execx86(int cycs)
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case 0x18: /*DS*/
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tempw=geteaw();
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loadseg(tempw,&_ds);
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if (ssegs) oldds=ds;
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if (cpu_state.ssegs) oldds=ds;
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break;
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case 0x10: /*SS*/
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tempw=geteaw();
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loadseg(tempw,&_ss);
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if (ssegs) oldss=ss;
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if (cpu_state.ssegs) oldss=ss;
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// printf("LOAD SS %04X %04X\n",tempw,SS);
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// printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4);
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break;
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@ -2097,7 +2095,7 @@ void execx86(int cycs)
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case 0x8F: /*POPW*/
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fetchea();
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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tempw=readmemw(ss,SP);
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SP+=2;
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seteaw(tempw);
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@ -2129,7 +2127,7 @@ void execx86(int cycs)
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tempw2=getword();
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tempw3=CS;
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tempw4=cpu_state.pc;
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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cpu_state.pc=tempw;
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// printf("0x9a");
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loadcs(tempw2);
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@ -2143,13 +2141,13 @@ void execx86(int cycs)
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cycles-=4;
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break;
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case 0x9C: /*PUSHF*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
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SP-=2;
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cycles-=14;
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break;
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case 0x9D: /*POPF*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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flags=readmemw(ss,SP)&0xFFF;
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SP+=2;
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cycles-=12;
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@ -2311,7 +2309,7 @@ void execx86(int cycs)
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case 0xC0: /*RET alias*/
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case 0xC2: /*RET*/
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tempw=getword();
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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cpu_state.pc=readmemw(ss,SP);
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// printf("C2\n");
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// printf("RET to %04X\n",pc);
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@ -2321,7 +2319,7 @@ void execx86(int cycs)
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break;
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case 0xC1: /*RET alias*/
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case 0xC3: /*RET*/
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if (ssegs) ss=oldss;
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if (cpu_state.ssegs) ss=oldss;
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cpu_state.pc=readmemw(ss,SP);
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// printf("C3\n");
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// if (output) printf("RET to %04X %05X\n",pc,ss+SP);
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@ -2331,17 +2329,17 @@ void execx86(int cycs)
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break;
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case 0xC4: /*LES*/
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fetchea();
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cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr); //geteaw();
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tempw=readmemw(easeg,(eaaddr+2)&0xFFFF); //geteaw2();
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cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); //geteaw();
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tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2();
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||||
loadseg(tempw,&_es);
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||||
cycles-=24;
|
||||
break;
|
||||
case 0xC5: /*LDS*/
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||||
fetchea();
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||||
cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr);
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||||
tempw=readmemw(easeg,(eaaddr+2)&0xFFFF);
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||||
cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr);
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||||
tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF);
|
||||
loadseg(tempw,&_ds);
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||||
if (ssegs) oldds=ds;
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||||
if (cpu_state.ssegs) oldds=ds;
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||||
cycles-=24;
|
||||
break;
|
||||
case 0xC6: /*MOV b,#8*/
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||||
|
|
@ -2360,7 +2358,7 @@ void execx86(int cycs)
|
|||
case 0xC8: /*RETF alias*/
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||||
case 0xCA: /*RETF*/
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||||
tempw=getword();
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
cpu_state.pc=readmemw(ss,SP);
|
||||
// printf("CA\n");
|
||||
loadcs(readmemw(ss,SP+2));
|
||||
|
|
@ -2371,7 +2369,7 @@ void execx86(int cycs)
|
|||
break;
|
||||
case 0xC9: /*RETF alias*/
|
||||
case 0xCB: /*RETF*/
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
cpu_state.pc=readmemw(ss,SP);
|
||||
// printf("CB\n");
|
||||
loadcs(readmemw(ss,SP+2));
|
||||
|
|
@ -2380,7 +2378,7 @@ void execx86(int cycs)
|
|||
FETCHCLEAR();
|
||||
break;
|
||||
case 0xCC: /*INT 3*/
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
|
||||
writememw(ss,((SP-4)&0xFFFF),CS);
|
||||
writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
|
||||
|
|
@ -2400,7 +2398,7 @@ void execx86(int cycs)
|
|||
lastcs=CS;
|
||||
temp=FETCH();
|
||||
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
|
||||
writememw(ss,((SP-4)&0xFFFF),CS);
|
||||
writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
|
||||
|
|
@ -2415,7 +2413,7 @@ void execx86(int cycs)
|
|||
cycles-=71;
|
||||
break;
|
||||
case 0xCF: /*IRET*/
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
tempw=CS;
|
||||
tempw2=cpu_state.pc;
|
||||
cpu_state.pc=readmemw(ss,SP);
|
||||
|
|
@ -2941,7 +2939,7 @@ void execx86(int cycs)
|
|||
|
||||
case 0xE8: /*CALL rel 16*/
|
||||
tempw=getword();
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
// writememb(ss+((SP-1)&0xFFFF),pc>>8);
|
||||
writememw(ss,((SP-2)&0xFFFF),cpu_state.pc);
|
||||
SP-=2;
|
||||
|
|
@ -3343,7 +3341,7 @@ void execx86(int cycs)
|
|||
break;
|
||||
case 0x10: /*CALL*/
|
||||
tempw=geteaw();
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
writememw(ss,(SP-2)&0xFFFF,cpu_state.pc);
|
||||
SP-=2;
|
||||
cpu_state.pc=tempw;
|
||||
|
|
@ -3352,11 +3350,11 @@ void execx86(int cycs)
|
|||
FETCHCLEAR();
|
||||
break;
|
||||
case 0x18: /*CALL far*/
|
||||
tempw=readmemw(easeg,eaaddr);
|
||||
tempw2=readmemw(easeg,(eaaddr+2)&0xFFFF); //geteaw2();
|
||||
tempw=readmemw(easeg,cpu_state.eaaddr);
|
||||
tempw2=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2();
|
||||
tempw3=CS;
|
||||
tempw4=cpu_state.pc;
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
cpu_state.pc=tempw;
|
||||
// printf("FF 18\n");
|
||||
loadcs(tempw2);
|
||||
|
|
@ -3373,9 +3371,9 @@ void execx86(int cycs)
|
|||
FETCHCLEAR();
|
||||
break;
|
||||
case 0x28: /*JMP far*/
|
||||
cpu_state.pc=readmemw(easeg,eaaddr); //geteaw();
|
||||
cpu_state.pc=readmemw(easeg,cpu_state.eaaddr); //geteaw();
|
||||
// printf("FF 28\n");
|
||||
loadcs(readmemw(easeg,(eaaddr+2)&0xFFFF)); //geteaw2();
|
||||
loadcs(readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF)); //geteaw2();
|
||||
// cs=loadcs(CS);
|
||||
// cs=CS<<4;
|
||||
cycles-=24;
|
||||
|
|
@ -3384,7 +3382,7 @@ void execx86(int cycs)
|
|||
case 0x30: /*PUSH w*/
|
||||
tempw=geteaw();
|
||||
// if (output) printf("PUSH %04X %i %02X %04X %04X %02X %02X\n",tempw,cpu_rm,rmdat,easeg,eaaddr,ram[0x22340+0x5638],ram[0x22340+0x5639]);
|
||||
if (ssegs) ss=oldss;
|
||||
if (cpu_state.ssegs) ss=oldss;
|
||||
writememw(ss,((SP-2)&0xFFFF),tempw);
|
||||
SP-=2;
|
||||
cycles-=((cpu_mod==3)?15:24);
|
||||
|
|
@ -3420,11 +3418,11 @@ void execx86(int cycs)
|
|||
exit(-1);
|
||||
}
|
||||
output = 3;*/
|
||||
if (ssegs)
|
||||
if (cpu_state.ssegs)
|
||||
{
|
||||
ds=oldds;
|
||||
ss=oldss;
|
||||
ssegs=0;
|
||||
cpu_state.ssegs=0;
|
||||
}
|
||||
|
||||
// output = 3;
|
||||
|
|
@ -3475,7 +3473,7 @@ void execx86(int cycs)
|
|||
FETCHCLEAR();
|
||||
nmi_enable = 0;
|
||||
}
|
||||
else if (takeint && !ssegs && !noint)
|
||||
else if (takeint && !cpu_state.ssegs && !noint)
|
||||
{
|
||||
temp=picinterrupt();
|
||||
if (temp!=0xFF)
|
||||
|
|
|
|||
Loading…
Reference in a new issue