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Implement port 0x70 NMI mask. Patch from Greatpsycho.

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This commit is contained in:
SarahW 2017-07-19 19:35:01 +01:00
commit 8b433633c0
4 changed files with 11 additions and 3 deletions
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3
src/386.c
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@ -10,6 +10,7 @@
#include "fdc.h" #include "fdc.h"
#include "pic.h" #include "pic.h"
#include "timer.h" #include "timer.h"
#include "nmi.h"
#include "386_common.h" #include "386_common.h"
@ -319,7 +320,7 @@ dontprint=0;
loadcs(readmemw(0,addr+2)); loadcs(readmemw(0,addr+2));
} }
} }
else if (nmi && nmi_enable) else if (nmi && nmi_enable && nmi_mask)
{ {
cpu_state.oldpc = cpu_state.pc; cpu_state.oldpc = cpu_state.pc;
oldcs = CS; oldcs = CS;

1
src/model.c
View file

@ -317,6 +317,7 @@ void at_init()
nvr_init(); nvr_init();
pic2_init(); pic2_init();
device_add(&gameport_device); device_add(&gameport_device);
nmi_mask = 0;
} }
void ibm_at_init() void ibm_at_init()

7
src/nvr.c
View file

@ -7,6 +7,7 @@
#include "rtc.h" #include "rtc.h"
#include "paths.h" #include "paths.h"
#include "config.h" #include "config.h"
#include "nmi.h"
int oldromset; int oldromset;
int nvrmask=63; int nvrmask=63;
@ -176,7 +177,11 @@ void writenvr(uint16_t addr, uint8_t val, void *priv)
} }
} }
} }
else nvraddr=val&nvrmask; else
{
nvraddr=val&nvrmask;
nmi_mask = ~val & 0x80;
}
} }
uint8_t readnvr(uint16_t addr, void *priv) uint8_t readnvr(uint16_t addr, void *priv)

3
src/scat.c
View file

@ -5,6 +5,7 @@
#include "mem.h" #include "mem.h"
#include "scat.h" #include "scat.h"
#include "x86.h" #include "x86.h"
#include "nmi.h"
static uint8_t scat_regs[256]; static uint8_t scat_regs[256];
static int scat_index; static int scat_index;
@ -395,7 +396,7 @@ uint8_t scat_read(uint16_t port, void *priv)
switch (scat_index) switch (scat_index)
{ {
case SCAT_MISCELLANEOUS_STATUS: case SCAT_MISCELLANEOUS_STATUS:
val = (scat_regs[scat_index] & 0xbf) | ((mem_a20_key & 2) << 5); val = (scat_regs[scat_index] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5);
break; break;
case SCAT_DRAM_CONFIGURATION: case SCAT_DRAM_CONFIGURATION:
val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10);