diff --git a/src/386.c b/src/386.c index 8a03cc4..6b81d79 100644 --- a/src/386.c +++ b/src/386.c @@ -10,6 +10,7 @@ #include "fdc.h" #include "pic.h" #include "timer.h" +#include "nmi.h" #include "386_common.h" @@ -319,7 +320,7 @@ dontprint=0; loadcs(readmemw(0,addr+2)); } } - else if (nmi && nmi_enable) + else if (nmi && nmi_enable && nmi_mask) { cpu_state.oldpc = cpu_state.pc; oldcs = CS; diff --git a/src/model.c b/src/model.c index 5f6bd68..d26d293 100644 --- a/src/model.c +++ b/src/model.c @@ -317,6 +317,7 @@ void at_init() nvr_init(); pic2_init(); device_add(&gameport_device); + nmi_mask = 0; } void ibm_at_init() diff --git a/src/nvr.c b/src/nvr.c index 9258eea..e4934e0 100644 --- a/src/nvr.c +++ b/src/nvr.c @@ -7,6 +7,7 @@ #include "rtc.h" #include "paths.h" #include "config.h" +#include "nmi.h" int oldromset; int nvrmask=63; @@ -176,7 +177,11 @@ void writenvr(uint16_t addr, uint8_t val, void *priv) } } } - else nvraddr=val&nvrmask; + else + { + nvraddr=val&nvrmask; + nmi_mask = ~val & 0x80; + } } uint8_t readnvr(uint16_t addr, void *priv) diff --git a/src/scat.c b/src/scat.c index 2a27a04..14a4406 100644 --- a/src/scat.c +++ b/src/scat.c @@ -5,6 +5,7 @@ #include "mem.h" #include "scat.h" #include "x86.h" +#include "nmi.h" static uint8_t scat_regs[256]; static int scat_index; @@ -395,7 +396,7 @@ uint8_t scat_read(uint16_t port, void *priv) switch (scat_index) { case SCAT_MISCELLANEOUS_STATUS: - val = (scat_regs[scat_index] & 0xbf) | ((mem_a20_key & 2) << 5); + val = (scat_regs[scat_index] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5); break; case SCAT_DRAM_CONFIGURATION: val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10);