Implement port 0x70 NMI mask. Patch from Greatpsycho.
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4 changed files with 11 additions and 3 deletions
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@ -10,6 +10,7 @@
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#include "fdc.h"
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#include "pic.h"
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#include "timer.h"
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#include "nmi.h"
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#include "386_common.h"
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@ -319,7 +320,7 @@ dontprint=0;
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loadcs(readmemw(0,addr+2));
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}
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}
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else if (nmi && nmi_enable)
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else if (nmi && nmi_enable && nmi_mask)
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{
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cpu_state.oldpc = cpu_state.pc;
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oldcs = CS;
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@ -317,6 +317,7 @@ void at_init()
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nvr_init();
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pic2_init();
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device_add(&gameport_device);
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nmi_mask = 0;
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}
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void ibm_at_init()
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@ -7,6 +7,7 @@
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#include "rtc.h"
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#include "paths.h"
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#include "config.h"
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#include "nmi.h"
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int oldromset;
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int nvrmask=63;
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@ -176,7 +177,11 @@ void writenvr(uint16_t addr, uint8_t val, void *priv)
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}
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}
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}
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else nvraddr=val&nvrmask;
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else
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{
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nvraddr=val&nvrmask;
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nmi_mask = ~val & 0x80;
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}
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}
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uint8_t readnvr(uint16_t addr, void *priv)
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@ -5,6 +5,7 @@
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#include "mem.h"
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#include "scat.h"
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#include "x86.h"
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#include "nmi.h"
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static uint8_t scat_regs[256];
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static int scat_index;
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@ -395,7 +396,7 @@ uint8_t scat_read(uint16_t port, void *priv)
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switch (scat_index)
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{
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case SCAT_MISCELLANEOUS_STATUS:
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val = (scat_regs[scat_index] & 0xbf) | ((mem_a20_key & 2) << 5);
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val = (scat_regs[scat_index] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5);
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break;
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case SCAT_DRAM_CONFIGURATION:
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val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10);
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