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CL-GD54xx now defaults to 8 bpp correctly when enhanced RAMDAC modes not set.

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This commit is contained in:
SarahW 2018-04-08 12:42:22 +01:00
commit 7ffb019962
1 changed files with 1 additions and 3 deletions
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4
src/vid_cl5429.c
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@ -499,14 +499,12 @@ void gd5429_recalctimings(svga_t *svga)
svga->interlace = svga->crtc[0x1a] & 1;
if (svga->seqregs[7] & 0x01)
{
svga->render = svga_render_8bpp_highres;
svga->bpp = 8;
}
svga->ma_latch |= ((svga->crtc[0x1b] & 0x01) << 16) | ((svga->crtc[0x1b] & 0xc) << 15);
// pclog("MA now %05X %02X\n", svga->ma_latch, svga->crtc[0x1b]);
svga->bpp = 8;
if (gd5429->hidden_dac_reg & 0x80)
{
if (gd5429->hidden_dac_reg & 0x40)