From 7ffb01996248199b64911c9f25c5dc92001c6f09 Mon Sep 17 00:00:00 2001 From: SarahW Date: Sun, 8 Apr 2018 12:42:22 +0100 Subject: [PATCH] CL-GD54xx now defaults to 8 bpp correctly when enhanced RAMDAC modes not set. --- src/vid_cl5429.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/vid_cl5429.c b/src/vid_cl5429.c index c361f20..f2e5b05 100644 --- a/src/vid_cl5429.c +++ b/src/vid_cl5429.c @@ -499,14 +499,12 @@ void gd5429_recalctimings(svga_t *svga) svga->interlace = svga->crtc[0x1a] & 1; if (svga->seqregs[7] & 0x01) - { svga->render = svga_render_8bpp_highres; - svga->bpp = 8; - } svga->ma_latch |= ((svga->crtc[0x1b] & 0x01) << 16) | ((svga->crtc[0x1b] & 0xc) << 15); // pclog("MA now %05X %02X\n", svga->ma_latch, svga->crtc[0x1b]); + svga->bpp = 8; if (gd5429->hidden_dac_reg & 0x80) { if (gd5429->hidden_dac_reg & 0x40)