175 lines
3.9 KiB
Markdown
175 lines
3.9 KiB
Markdown
#### Stacking the Palette Registers {#Heading4}
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Suppose that instead of viewing the four bits per pixel coming out of
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display memory as selecting one of sixteen colors,we view those bits as
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selecting one of *four* colors. If the bit from plane 0 is 1, that would
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select color 0 (say, red). The bit from plane 1 would select color 1
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(say, green), the bit from plane 2 would select color 2 (say, blue), and
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the bit from plane 3 would select color 3 (say, white). Whenever more
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than 1 bit is 1, the 1 bit from the lowest-numbered plane would
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determine the color, and 1 bits from all other planes would be ignored.
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Finally, the absence of any 1 bits at all would select the background
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color (say, black).
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That would give us four colors and the background color. It would also
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give us nifty image precedence, with images in plane 0 appearing to be
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in front of images from the other planes, images in plane 1 appearing to
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be in front of images from planes 2 and 3, and so on. It would even give
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us transparency, where rearward images would show through holes within
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and around the edges of images in forward planes. Finally, and most
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importantly, it would meet all the criteria needed to allow us to store
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each image in a single plane, letting us manipulate the images very
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quickly and with no reprogramming of the VGA's hardware other than the
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few **OUT** instructions required to select the plane we want to write
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to.
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Which leaves only one question: How do we get this magical
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pixel-precedence scheme to work? As it turns out, all we need to do is
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reprogram the palette registers so that the 1 bit from the plane with
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the highest precedence determines the color. The palette RAM settings
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for the colors described above are summarized in Table 43.1.
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Remember that the 4-bit values coming from display memory select which
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palette register provides the actual pixel color. Given that, it's easy
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to see that the rightmost 1-bit of the four bits coming from display
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memory in Table 43.1 selects the pixel color. If the bit from plane 0 is
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1, then the color is red, no matter what the other bits are, as shown in
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Figure 43.4. If the bit from plane 0 is 0, then if the bit from plane 1
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is 1 the color is green, and so on for planes 2 and 3. In other words,
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with the palette register settings we instantly have exactly what we
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want, which is an approach that keeps images in one plane from
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interfering with images in other planes while providing precedence and
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transparency.
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* * * * *
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Bit Value For Plane\
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3 2 1 0
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Palette Register
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Register setting
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* * * * *
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0 0 0 0
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0
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00H (black)
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0 0 0 1
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1
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3CH (red)
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0 0 1 0
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2
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3AH (green)
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0 0 1 1
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3
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3CH (red)
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0 1 0 0
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4
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39H (blue)
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0 1 0 1
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5
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3CH (red)
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0 1 1 0
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6
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3AH (green)
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0 1 1 1
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7
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3CH (red)
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1 0 0 0
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8
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3FH (white)
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1 0 0 1
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9
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3CH (red)
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1 0 1 0
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10
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3AH (green)
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1 0 1 1
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11
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3CH (red)
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1 1 0 0
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12
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39H (blue)
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1 1 0 1
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13
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3CH (red)
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1 1 1 0
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14
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3AH (green)
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1 1 1 1
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15
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3CH (red)
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* * * * *
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Table 43.1 Palette RAM settings for bit-plane animation.
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* * * * *
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\
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**Figure 43.4** *How pixel precedence works.*
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Seems almost too easy, doesn't it? Nonetheless, it works beautifully, as
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we'll see very shortly. First, though, I'd like to point out that
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there's nothing sacred about plane 0 having precedence. We could
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rearrange the palette register settings so that any plane had the
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highest precedence, followed by the other planes in any order. I've
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chosen to make plane 0 the highest precedence only because it seems
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simplest to think of plane 0 as appearing in front of plane 1, which is
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in front of plane 2, which is in front of plane 3.
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### Bit-Plane Animation in Action {#Heading5}
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Without further ado, Listing 43.1 shows bit-plane animation in action.
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Listing 43.1 animates 13 rather large images (each 32 pixels on a side)
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over a complex background at a good clip *even on a primordial
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8088-based PC*. Five of the images move very quickly, while the other 8
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bounce back and forth at a steady pace.
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